Datasheet LTC2165, LTC2164, LTC2163 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | 16-Bit, 125Msps Low Power ADCs |
| Páginas / Página | 36 / 9 — TiMing DiagraMs. Double Data Rate CMOS Output Mode Timing. All Outputs … |
| Formato / tamaño de archivo | PDF / 684 Kb |
| Idioma del documento | Inglés |
TiMing DiagraMs. Double Data Rate CMOS Output Mode Timing. All Outputs are Single-Ended and Have CMOS Levels
Línea de modelo para esta hoja de datos
- LTC2163CUK#PBF LTC2163CUK#PBF LTC2163CUK#TRPBF LTC2163CUK#TRPBF LTC2163IUK#PBF LTC2163IUK#PBF LTC2163IUK#TRPBF LTC2163IUK#TRPBF
Versión de texto del documento
LTC2165/LTC2164/LTC2163
TiMing DiagraMs Double Data Rate CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1 D0N-6 D1N-6 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 ••• D14_15 D14N-6 D15N-6 D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 OF OFN-6 OFN-5 OFN-4 OFN-3 tC tC CLKOUT+ CLKOUT– 2165 TD02
Double Data Rate LVDS Output Mode Timing All Outputs are Differential and Have LVDS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-6 D1N-6 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0_1– ••• D14_15+ D14N-6 D15N-6 D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 D14_15– OF+ OFN-6 OFN-5 OFN-4 OFN-3 OF– tC tC CLKOUT+ CLKOUT– 2165 TD03 216543f 9 Document Outline Features Applications Description Absolute Maximum Ratings Typical Application Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Electrical Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts
TiMing DiagraMs Double Data Rate CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1 D0N-6 D1N-6 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 ••• D14_15 D14N-6 D15N-6 D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 OF OFN-6 OFN-5 OFN-4 OFN-3 tC tC CLKOUT+ CLKOUT– 2165 TD02
Double Data Rate LVDS Output Mode Timing All Outputs are Differential and Have LVDS Levels
tAP ANALOG N N + 2 N + 4 INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-6 D1N-6 D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0_1– ••• D14_15+ D14N-6 D15N-6 D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 D14_15– OF+ OFN-6 OFN-5 OFN-4 OFN-3 OF– tC tC CLKOUT+ CLKOUT– 2165 TD03 216543f 9 Document Outline Features Applications Description Absolute Maximum Ratings Typical Application Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Electrical Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts