LTC1850/LTC1851 8-Channel, 10-Bit/12-Bit, 1.25Msps Sampling ADCs UFEATURESDESCRIPTIO ■ Flexible 8-Channel Multiplexer The 10-bit LTC®1850 and 12-bit LTC1851 are complete ■ Single-Ended or Differential Inputs 8-channel data acquisition systems. They include a flex- ■ Two Gain Ranges Plus Unipolar and Bipolar ible 8-channel multiplexer, a 1.25Msps successive approxi- Operation mation analog-to-digital converter with sample-and-hold, ■ 1.25Msps Sampling Rate an internal 2.5V reference and reference buffer amplifier, ■ Single 5V Supply and 40mW Power Dissipation and a parallel output interface. The multiplexer can be con- ■ Scan Mode and Programmable Sequencer figured for single-ended or differential inputs, two gain ■ Pin Compatible 10-Bit LTC1850 and 12-Bit LTC1851 ranges and unipolar or bipolar operation. ■ True Differential Inputs Reject Common Mode Noise The ADCs have a scan mode that will repeatedly cycle ■ Internal 2.5V Reference through all 8 multiplexer channels and can also be ■ Parallel Output Includes MUX Address programmed with a sequence of up to 16 addresses and ■ Easy Interface to 3V Logic configurations that can be scanned in succession. The ■ Nap and Sleep Shutdown Modes sequence memory can also be read back. The reference U and buffer amplifier provide pin strappable ranges of APPLICATIO S 4.096V, 2.5V and 2.048V. The parallel output includes ■ High Speed Data Acquisition the 10-bit or 12-bit conversion result plus the 4-bit ■ Test and Measurement multiplexer address. The digital outputs are powered ■ Imaging Systems from a separate supply allowing for easy interface to 3V ■ Telecommunications digital logic. Typical power consumption is 40mW at ■ Industrial Process Control 1.25Msps from a single 5V supply. ■ Spectrum Analysis , LTC and LT are registered trademarks of Linear Technology Corporation. WBLOCK DIAGRA LTC1851 M1 CH0 SHDN CS CH1 CONVST RD CONTROL LOGIC CH2 WR AND DIFF PROGRAMMABLE Integral Linearity, LTC1851 A2 CH3 SEQUENCER A1 1.00 8-CHANNEL A0 INTERNAL CH4 MULTIPLEXER UNI/BIP CLOCK PGA M0 CH5 0.50 OVDD CH6 BUSY DIFFOUT/S6 0.00 CH7 A2OUT/S5 A1OUT/S4 A0 COM OUT/S3 D11/S2 INL COC ERROR (LSBs) –0.50 D10/S1 2.5V D9/S0 REFOUT 12-BIT DATA OUTPUT REFERENCE D8 1.25Msps ADC LATCHES DRIVERS D7 –1.00 D6 0 512 1024 1536 2048 2560 3072 3584 4096 D5 CODE D4 D3 LTC1850/51 G01 REFIN REF AMP D2 D1 D0 OGND REFCOMP 1851 BD 18501f 1