Datasheet LTC1743 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | 12-Bit, 50Msps ADC |
| Páginas / Página | 24 / 9 — PI FU CTIO S. SENSE (Pin 1):. MSBINV (Pin 22):. ENC (Pin 23):. VCM (Pin … |
| Formato / tamaño de archivo | PDF / 524 Kb |
| Idioma del documento | Inglés |
PI FU CTIO S. SENSE (Pin 1):. MSBINV (Pin 22):. ENC (Pin 23):. VCM (Pin 2):. ENC (Pin 24):
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LTC1743
U U U PI FU CTIO S SENSE (Pin 1):
Reference Sense Pin. Ground selects
MSBINV (Pin 22):
MSB Inversion Control. Low inverts ±1V. VDD selects ±1.6V. Greater than 1V and less than the MSB, 2’s complement output format. High does not 1.6V applied to the SENSE pin selects an input range of invert the MSB, offset binary output format. ±VSENSE, ±1.6V is the largest valid input range.
ENC (Pin 23):
Encode Input. The input sample starts on
VCM (Pin 2):
2.5V Output and Input Common Mode Bias. the positive edge. Bypass to ground with 4.7µF ceramic chip capacitor.
ENC (Pin 24):
Encode Complement Input. Conversion
GND (Pins 3, 6, 9, 12, 13, 16, 19, 21, 36, 37):
ADC starts on the negative edge. Bypass to ground with 0.1µF Power Ground. ceramic for single-ended encode signal.
A + IN (Pin 4):
Positive Differential Analog Input.
OE (Pin 25):
Output Enable. Low enables outputs. Logic
A –
high makes outputs Hi-Z.
IN (Pin 5):
Negative Differential Analog Input.
V CLKOUT (Pin 26):
Data Valid Output. Latch data on the
DD (Pins 7, 8, 17, 18, 20):
5V Supply. Bypass to AGND with 1µF ceramic chip capacitor. rising edge of CLKOUT.
REFLB (Pin 10):
ADC Low Reference. Bypass to Pin 11
OGND (Pins 27, 38, 47):
Output Driver Ground. with 0.1µF ceramic chip capacitor. Do not connect to
NC (Pins 28, 29):
Do not connect these pins. Pin␣ 14.
D0-D1 (Pins 30 to 31):
Digital Outputs. D0 is the LSB.
REFHA (Pin 11):
ADC High Reference. Bypass to Pin 10
OVDD (Pins 32, 43):
Positive Supply for the Output Driv- with 0.1µF ceramic chip capacitor, to Pin 14 with a 4.7µF ers. Bypass to ground with 0.1µF ceramic chip capacitor. ceramic capacitor and to ground with 1µF ceramic
D2-D4 (Pins 33 to 35):
Digital Outputs. capacitor.
D5-D8 (Pins 39 to 42):
Digital Outputs.
REFLA (Pin 14):
ADC Low Reference. Bypass to Pin 15 with 0.1µF ceramic chip capacitor, to Pin 11 with a 4.7µF
D9-D11 (Pins 44 to 46):
Digital Outputs. D11 is the MSB. ceramic capacitor and to ground with 1µF ceramic
OF (Pin 48):
Over/Under Flow Output. High when an over capacitor. or under flow has occurred.
REFHB (Pin 15):
ADC High Reference. Bypass to Pin 14 with 0.1µF ceramic chip capacitor. Do not connect to Pin␣ 11. 1743f 9
U U U PI FU CTIO S SENSE (Pin 1):
Reference Sense Pin. Ground selects
MSBINV (Pin 22):
MSB Inversion Control. Low inverts ±1V. VDD selects ±1.6V. Greater than 1V and less than the MSB, 2’s complement output format. High does not 1.6V applied to the SENSE pin selects an input range of invert the MSB, offset binary output format. ±VSENSE, ±1.6V is the largest valid input range.
ENC (Pin 23):
Encode Input. The input sample starts on
VCM (Pin 2):
2.5V Output and Input Common Mode Bias. the positive edge. Bypass to ground with 4.7µF ceramic chip capacitor.
ENC (Pin 24):
Encode Complement Input. Conversion
GND (Pins 3, 6, 9, 12, 13, 16, 19, 21, 36, 37):
ADC starts on the negative edge. Bypass to ground with 0.1µF Power Ground. ceramic for single-ended encode signal.
A + IN (Pin 4):
Positive Differential Analog Input.
OE (Pin 25):
Output Enable. Low enables outputs. Logic
A –
high makes outputs Hi-Z.
IN (Pin 5):
Negative Differential Analog Input.
V CLKOUT (Pin 26):
Data Valid Output. Latch data on the
DD (Pins 7, 8, 17, 18, 20):
5V Supply. Bypass to AGND with 1µF ceramic chip capacitor. rising edge of CLKOUT.
REFLB (Pin 10):
ADC Low Reference. Bypass to Pin 11
OGND (Pins 27, 38, 47):
Output Driver Ground. with 0.1µF ceramic chip capacitor. Do not connect to
NC (Pins 28, 29):
Do not connect these pins. Pin␣ 14.
D0-D1 (Pins 30 to 31):
Digital Outputs. D0 is the LSB.
REFHA (Pin 11):
ADC High Reference. Bypass to Pin 10
OVDD (Pins 32, 43):
Positive Supply for the Output Driv- with 0.1µF ceramic chip capacitor, to Pin 14 with a 4.7µF ers. Bypass to ground with 0.1µF ceramic chip capacitor. ceramic capacitor and to ground with 1µF ceramic
D2-D4 (Pins 33 to 35):
Digital Outputs. capacitor.
D5-D8 (Pins 39 to 42):
Digital Outputs.
REFLA (Pin 14):
ADC Low Reference. Bypass to Pin 15 with 0.1µF ceramic chip capacitor, to Pin 11 with a 4.7µF
D9-D11 (Pins 44 to 46):
Digital Outputs. D11 is the MSB. ceramic capacitor and to ground with 1µF ceramic
OF (Pin 48):
Over/Under Flow Output. High when an over capacitor. or under flow has occurred.
REFHB (Pin 15):
ADC High Reference. Bypass to Pin 14 with 0.1µF ceramic chip capacitor. Do not connect to Pin␣ 11. 1743f 9