LTC1603 UUUPIN FUNCTIONSA +IN (Pin 1): Positive Analog Input. The ADC converts the OGND (Pin 28): Digital Ground for Output Drivers. difference voltage between A + – IN and AIN with a differen- OV tial range of ±2.5V. A + DD (Pin 29): Digital Power Supply for Output Drivers. IN has a ±2.5V input range when Bypass to OGND with 10µF tantalum in parallel with 0.1µF A – IN is grounded. ceramic. A –IN (Pin 2): Negative Analog Input. Can be grounded, tied RD (Pin 30): Read Input. A logic low enables the output to a DC voltage or driven differentially with A + IN . drivers when CS is low. VREF (Pin 3): 2.5V Reference Output. Bypass to AGND with CONVST (Pin 31): Conversion Start Signal. This active 2.2µF tantalum in parallel with 0.1µF ceramic. low signal starts a conversion on its falling edge when CS REFCOMP (Pin 4): 4.375V Reference Compensation Pin. is low. Bypass to AGND with 47µF tantalum in parallel with 0.1µF CS (Pin 32): The Chip Select Input. Must be low for the ceramic. ADC to recognize CONVST and RD inputs. AGND (Pins 5 to 8): Analog Grounds. Tie to analog ground SHDN (Pin 33): Power Shutdown. Drive this pin low with plane. CS low for nap mode. Drive this pin low with CS high for DVDD (Pin 9): 5V Digital Power Supply. Bypass to DGND sleep mode. with 10µF tantalum in parallel with 0.1µF ceramic. VSS (Pin 34): – 5V Negative Supply. Bypass to AGND with DGND (Pin 10): Digital Ground for Internal Logic. Tie to 10µF tantalum in parallel with 0.1µF ceramic. analog ground plane. AVDD (Pin 35): 5V Analog Power Supply. Bypass to AGND D15 to D0 (Pins 11 to 26): Three-State Data Outputs. D15 with 10µF tantalum in parallel with 0.1µF ceramic. is the Most Significant Bit. AVDD (Pin 36): 5V Analog Power Supply. Bypass to AGND BUSY (Pin 27): The BUSY output shows the converter with 10µF tantalum in parallel with 0.1µF ceramic and status. It is low when a conversion is in progress. Data is connect this pin to Pin 35 with a 10Ω resistor. valid on the rising edge of BUSY. 1603f 6