Datasheet LTC1407, LTC1407A (Analog Devices)

FabricanteAnalog Devices
DescripciónSerial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown
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FEATURES. DESCRIPTION. 3Msps Sampling ADC with Two Simultaneous. Differential Inputs. 1.5Msps Throughput per Channel

Datasheet LTC1407, LTC1407A Analog Devices

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LTC1407/LTC1407A Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown
FEATURES DESCRIPTION
n
3Msps Sampling ADC with Two Simultaneous
The LTC®1407/LTC1407A are 12-bit/14-bit, 3Msps ADCs
Differential Inputs
with two 1.5Msps simultaneously sampled differential n
1.5Msps Throughput per Channel
inputs. The devices draw only 4.7mA from a single 3V n
Low Power Dissipation: 14mW (Typ)
supply and come in a tiny 10-lead MS package. A Sleep n
3V Single Supply Operation
shutdown feature lowers power consumption to 10μW. n 2.5V Internal Bandgap Reference with External The combination of speed, low power and tiny package Overdrive makes the LTC1407/LTC1407A suitable for high speed, n 3-Wire Serial Interface portable applications. n Sleep (10μW) Shutdown Mode The LTC1407/LTC1407A contain two separate differential n Nap (3mW) Shutdown Mode inputs that are sampled simultaneously on the rising edge n 80dB Common Mode Rejection at 100kHz of the CONV signal. These two sampled inputs are then n 0V to 2.5V Unipolar Input Range converted at a rate of 1.5Msps per channel. n Tiny 10-Lead MS Package The 80dB common mode rejection allows users to eliminate ground loops and common mode noise by measuring
APPLICATIONS
signals differentially from the source. n Telecommunications The devices convert 0V to 2.5V unipolar inputs differentially. n Data Acquisition Systems The absolute voltage swing for CH0+, CH0–, CH1+ and n Uninterrupted Power Supplies CH1– extends from ground to the supply voltage. n Multiphase Motor Control The serial interface sends out the two conversion results in 32 n I and Q Demodulation clocks for compatibility with standard serial interfaces. n Industrial Control L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6084440, 6522187.
BLOCK DIAGRAM
10μF 3V
THD, 2nd and 3rd vs Input Frequency
7 VDD LTC1407A –44 CH0+ 1 + –50 TCH S AND H –56 THD 2nd CH0– 2 – THREE- –62 14-BIT LA STATE 3Msps MUX SERIAL 8 SDO –68 14-BIT ADC 3rd OUTPUT –74 CH1+ TCH 4 + PORT –80 S AND H THD, 2nd, 3rd (dB) –86 CH1– 14-BIT LA 5 – 10 CONV –92 TIMING V –98 REF LOGIC 3 9 SCK –104 10μF GND 0.1 1 10 100 2.5V 6 REFERENCE FREQUENCY (MHz) 11 EXPOSED PAD 1407 G02 1407A BD 1407fb 1