Datasheet LTC1292, LTC1297 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Single Chip 12-Bit Data Acquisition Systems |
| Páginas / Página | 24 / 8 — TEST CIRCUITS. Voltage Waveforms for ten. APPLICATI. S I FOR ATIO. Table … |
| Formato / tamaño de archivo | PDF / 325 Kb |
| Idioma del documento | Inglés |
TEST CIRCUITS. Voltage Waveforms for ten. APPLICATI. S I FOR ATIO. Table 1. Microprocessor with Hardware Serial Interfaces
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LTC1292/LTC1297
TEST CIRCUITS Voltage Waveforms for ten
CS CLK B11 DOUT 0.8V ten LTC1292/7 TC07
O U U W U APPLICATI S I FOR ATIO
The LTC1292/LTC1297 are data acquisition components serial ports. Bringing CS high resets the LTC1292/LTC1297 which contain the following functional blocks: for the next data exchange and puts the LTC1297 into its 1. 12-Bit Succesive Approximation Capacitive A/D power shutdown mode. Converter
Table 1. Microprocessor with Hardware Serial Interfaces
2. Differential Input
Compatible with the LTC1292/LTC1297**
3. Sample-and-Hold (S/H)
PART NUMBER TYPE OF INTERFACE
4. Synchronous, Half-Duplex Serial Interface
Motorola
MC6805S2, S3 SPI 5. Control and Timing Logic MC68HC11 SPI MC68HC05 SPI
RCA DIGITAL CONSIDERATIONS
CDP68HC05 SPI
Hitachi Serial Interface
HD6305 SCI Synchronous The LTC1292/LTC1297 communicate with microproces- HD6301 SCI Synchronous HD63701 SCI Synchronous sors and other external circuitry via a synchronous, half- HD6303 SCI Synchronous duplex, three-wire serial interface (see Operating Se- HD64180 SCI Synchronous quence). The clock (CLK) synchronizes the data transfer
National Semiconductor
COP400 Family MICROWIRE† with each bit being transmitted on the falling CLK edge. COP800 Family MCROWIRE/PLUS† The LTC1292/LTC1297 do not require a configuration NS8050U MICROWIRE/PLUS HPC16000 Family MICROWIRE/PLUS input word and have no DIN pin. They are permanently
Texas Instruments
configured to have a single differential input and to per- TMS7002 Serial Port form a unipolar conversion. A falling CS initiates data TMS7042 Serial Port TMS70C02 Serial Port transfer. To allow the LTC1297 to recover from the power TMS70C42 Serial Port shutdown mode, tsuCS has to be met. Then the first CLK TMS32011* Serial Port pulse enables D TMS32020* Serial Port OUT. After one null bit, the A/D conversion TMS370C050 SPI result is output on the DOUT line with a MSB-first sequence followed by a LSB-first sequence. With the half-duplex * Requires external hardware ** Contact factory for interface information for processors not on this list serial interface the DOUT data is from the current conver- † MICROWIRE and MICROWIRE/PLUS are trademarks of National sion. This provides easy interface to MSB-first or LSB-first Semiconductor Corp. 12927fb 8
TEST CIRCUITS Voltage Waveforms for ten
CS CLK B11 DOUT 0.8V ten LTC1292/7 TC07
O U U W U APPLICATI S I FOR ATIO
The LTC1292/LTC1297 are data acquisition components serial ports. Bringing CS high resets the LTC1292/LTC1297 which contain the following functional blocks: for the next data exchange and puts the LTC1297 into its 1. 12-Bit Succesive Approximation Capacitive A/D power shutdown mode. Converter
Table 1. Microprocessor with Hardware Serial Interfaces
2. Differential Input
Compatible with the LTC1292/LTC1297**
3. Sample-and-Hold (S/H)
PART NUMBER TYPE OF INTERFACE
4. Synchronous, Half-Duplex Serial Interface
Motorola
MC6805S2, S3 SPI 5. Control and Timing Logic MC68HC11 SPI MC68HC05 SPI
RCA DIGITAL CONSIDERATIONS
CDP68HC05 SPI
Hitachi Serial Interface
HD6305 SCI Synchronous The LTC1292/LTC1297 communicate with microproces- HD6301 SCI Synchronous HD63701 SCI Synchronous sors and other external circuitry via a synchronous, half- HD6303 SCI Synchronous duplex, three-wire serial interface (see Operating Se- HD64180 SCI Synchronous quence). The clock (CLK) synchronizes the data transfer
National Semiconductor
COP400 Family MICROWIRE† with each bit being transmitted on the falling CLK edge. COP800 Family MCROWIRE/PLUS† The LTC1292/LTC1297 do not require a configuration NS8050U MICROWIRE/PLUS HPC16000 Family MICROWIRE/PLUS input word and have no DIN pin. They are permanently
Texas Instruments
configured to have a single differential input and to per- TMS7002 Serial Port form a unipolar conversion. A falling CS initiates data TMS7042 Serial Port TMS70C02 Serial Port transfer. To allow the LTC1297 to recover from the power TMS70C42 Serial Port shutdown mode, tsuCS has to be met. Then the first CLK TMS32011* Serial Port pulse enables D TMS32020* Serial Port OUT. After one null bit, the A/D conversion TMS370C050 SPI result is output on the DOUT line with a MSB-first sequence followed by a LSB-first sequence. With the half-duplex * Requires external hardware ** Contact factory for interface information for processors not on this list serial interface the DOUT data is from the current conver- † MICROWIRE and MICROWIRE/PLUS are trademarks of National sion. This provides easy interface to MSB-first or LSB-first Semiconductor Corp. 12927fb 8