Datasheet OP179, OP279 (Analog Devices) - 7

OP179/OP279
In order to achieve rail-to-rail output behavior, the OP179/OP279 ance levels. For more information on general overvoltage charac- design employs a complementary common-emitter (or gmRL) teristics of amplifiers refer to the 1993 Seminar Applications Guide, output stage (Q15-Q16), as illustrated in Figure 2. These available from the Analog Devices Literature Center. amplifiers provide output current until they are forced into
5
saturation, which occurs at approximately 50 mV from either
4
supply rail. Thus, their saturation voltage is the limit on the maximum output voltage swing in the OP179/OP279. The
3
output stage also exhibits voltage gain, by virtue of the use of
2
common-emitter amplifiers; and, as a result, the voltage gain of
mA – 1
the output stage (thus, the open-loop gain of the device) exhib- its a strong dependence to the total load resistance at the output
0
of the OP179/OP279 as illustrated in TPC 7.
–1 –2 INPUT CURRENT VPOS –3 –4 105
⍀
Q13 –5 –2.0 –1.0 0 1.0 2.0 I1 Q3 Q7 I3 INPUT VOLTAGE – V Q15
Figure 3. OP179/OP279 Input Overvoltage Characteristic
Q4 Q8 Output Phase Reversal Q1 Q11 150
⍀ Some operational amplifiers designed for single-supply operation
VOUT Q2 Q12
exhibit an output voltage phase reversal when their inputs are
Q5 Q9
driven beyond their useful common-mode range. Typically for single-supply bipolar op amps, the negative supply determines
Q16
the lower limit of their common-mode range. With these devices,
I2 Q6 Q10 I4
external clamping diodes, with the anode connected to ground and the cathode to the inputs, input signal excursions are pre-
105
⍀
Q14
vented from exceeding the device’s negative supply (i.e., GND), preventing a condition that could cause the output voltage to
VNEG
change phase. JFET input amplifiers may also exhibit phase reversal and, if so, a series input resistor is usually required to Figure 2. OP179/OP279 Equivalent Output Circuit prevent it.
Input Overvoltage Protection
The OP179/OP279 is free from reasonable input voltage range As with any semiconductor device, whenever the condition restrictions provided that input voltages no greater than the exists for the input to exceed either supply voltage, the device’s supply voltages are applied. Although the device’s output will input overvoltage characteristic must be considered. When an not change phase, large currents can flow through the input overvoltage occurs, the amplifier could be damaged, depending protection diodes, shown in Figure 1. Therefore, the technique on the magnitude of the applied voltage and the magnitude of recommended in the Input Overvoltage Protection section should the fault current. Figure 3 illustrates the input overvoltage char- be applied in those applications where the likelihood of input acteristic of the OP179/OP279. This graph was generated with voltages exceeding the supply voltages is possible. the power supplies at ground and a curve tracer connected to the input. As can be seen, when the input voltage exceeds either
Capacitive Load Drive
supply by more than 0.6 V, internal pn-junctions energize, The OP179/OP279 has excellent capacitive load driving capa- which allows current to flow from the input to the supplies. As bilities. It can drive up to 10 nF directly as the performance illustrated in the simplified equivalent input circuit (Figure 1), graph titled Small Signal Overshoot vs. Load Capacitance the OP179/OP279 does not have any internal current limiting (TPC 18) shows. However, even though the device is stable, a resistors, so fault currents can quickly rise to damaging levels. capacitive load does not come without a penalty in bandwidth. As shown in Figure 4, the bandwidth is reduced to under 1 MHz This input current is not inherently damaging to the device as for loads greater than 3 nF. A “snubber” network on the output long as it is limited to 5 mA or less. For the OP179/OP279, once will not increase the bandwidth, but it does significantly reduce the input voltage exceeds the supply by more than 0.6 V, the the amount of overshoot for a given capacitive load. A snubber input current quickly exceeds 5 mA. If this condition continues to consists of a series R-C network (R exist, an external series resistor should be added. The size of the S, CS), as shown in Figure 5, connected from the output of the device to ground. This net- resistor is calculated by dividing the maximum overvoltage by work operates in parallel with the load capacitor, C 5 mA. For example, if the input voltage could reach 100 V, the L, to provide phase lag compensation. The actual value of the resistor and external resistor should be (100 V/5 mA) = 20 kΩ. This resis- capacitor is best determined empirically. tance should be placed in series with either or both inputs if they are exposed to an overvoltage. Again, in order to ensure optimum dc and ac performance, it is important to balance source imped- REV. G –7–