Datasheet AD8004 (Analog Devices) - 8

FabricanteAnalog Devices
Descripción3000 V/µS, 35mW Current Feedback Quad Amplifier
Páginas / Página17 / 8 — AD8004. 100. 1000. G = +2. 5VS OR. 2.5VS. –10. 500. RF = 1k. 100mV rms ON …
RevisiónD
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Idioma del documentoInglés

AD8004. 100. 1000. G = +2. 5VS OR. 2.5VS. –10. 500. RF = 1k. 100mV rms ON TOP. 300. –20 OF dc BIAS. A/ p. +PSRR. 200. –30. –40. –PSRR. + OR – INPUT

AD8004 100 1000 G = +2 5VS OR 2.5VS –10 500 RF = 1k 100mV rms ON TOP 300 –20 OF dc BIAS A/ p +PSRR 200 –30 –40 –PSRR + OR – INPUT

Versión de texto del documento

AD8004 100 1000 0 G = +2 5VS OR 2.5VS –10 500 RF = 1k Hz Hz 100mV rms ON TOP 300 –20 OF dc BIAS A/ p +PSRR 200 –30 10 100 –40 –PSRR 70 + OR – INPUT PSRR – dB –50 CURRENT NOISE 50 40 30 –60 INPUT VOLTAGE NOISE – nV/ INPUT CURRENT NOISE – 20 VOLTAGE NOISE –70 10 1 –80 10 100 1k 10k 100k 1M 10k 100k 1M 10M 100M 500M FREQUENCY – Hz FREQUENCY – Hz
TPC 13. Noise vs. Frequency, VS = +5 V or ±5 VS TPC 16. PSRR vs. Frequency
–20 G = +2 100 –30 RF = 1.10k 5VS R –40 BT = 50 VIN = 200mV rms G = +2 5VS OR +5VS INPUT TO SIDE 1 –50 OUTPUT = R 10 F = 698 RL1 = 1k POWER = 0dBm SIDE 2 R PACKAGE (224mV rms) –60 OUTPUT = SIDE 4 +5V RBT = 0 –70 S 1 –80 IMPEDANCE – CROSSTALK – dB –90 OUTPUT = SIDE 3 0.1 5VS –100 –110 0.01 –120 0.03 0.1 1 10 100 500 0.03 0.1 1 10 100 500 FREQUENCY – MHz FREQUENCY – MHz
TPC 14. Output Impedance vs. Frequency TPC 17. Crosstalk (Output to Output) vs. Frequency
110 0 60 GAIN 100 GAIN 50 90 0 90 40 80 30 70 –50 PHASE PHASE –180 20 60 GAIN – dB 10 GAIN – dB 50 –100 PHASE – Degrees –240 VIN = –40dBm 0 40 VS = 5V PHASE – Degrees –10 30 –150 –360 20 10 –200 0.03 0.1 1 10 100 500 100k 1M 10M 100M 1G FREQUENCY – MHz FREQUENCY – Hz
TPC 15. Open-Loop Voltage Gain and Phase TPC 18. Open-Loop Transimpedance Gain REV. D –7– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE MAXIMUM POWER DISSIPATION Typical Performance Characteristics THEORY OF OPERATION DC AND AC CHARACTERISTICS DRIVING CAPACITIVE LOADS OPTIMIZING FLATNESS DRIVING A SINGLE-SUPPLY A/D CONVERTER LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS Revision History