Datasheet AD8079 (Analog Devices) - 9

AD8079 THEORY OF OPERATION 100 R
The AD8079, a dual current feedback amplifier, is internally
bT = 50
Ω configured for a gain of either +2 (AD8079A) or +2.2
VS =
±
5.0V
(AD8079B). The internal gain-setting resistors effectively elimi-
10 POWER = 0dBm
Ω nate any parasitic capacitance associated with the inverting in-
(223.6mV rms)
put pin, accounting for the AD8079’s excellent gain flatness
1 RbT = 0
Ω response. The carefully chosen pinout greatly reduces the cross- talk between each amplifier. Up to four back-terminated 75 Ω
RESISTANCE –
video loads can be driven by each amplifier, with a typical dif-
0.1
ferential gain and phase performance of 0.01%/0.17°, respec- tively. The AD8079B, with a gain of +2.2, can be employed as a
0.01
single gain-trimming element in a video signal chain. Finally, the AD8079A/B used in conjunction with our AD8116 cross-
10k 100k 1M 10M 100M 1G
point matrix, provides a complete turn-key solution to video
FREQUENCY – Hz
distribution.
Printed Circuit Board Layout Considerations
Figure 21. Output Resistance vs. Frequency As to be expected for a wideband amplifier, PC board parasitics can affect the overall closed-loop performance. If a ground plane is to be used on the same side of the board as the signal
–44.0
traces, a space (5 mm min) should be left around the signal lines to minimize coupling. Line lengths on the order of less than
–46.5 –PSRR
5 mm are recommended. If long runs of coaxial cable are being
–49.0
driven, dispersion and loss must be considered.
9 –51.5 2V SPAN Power Supply Bypassing –54.0
Adequate power supply bypassing can be critical when optimiz-
CURVES ARE FOR WORST –56.5 CASE CONDITION WHERE
ing the performance of a high frequency circuit. Inductance in
ONE SUPPLY IS VARIED
the power supply leads can form resonant circuits that produce
PSRR – dB WHILE THE OTHER IS –59.0 HELD CONSTANT.
peaking in the amplifier’s response. In addition, if large current
–61.5
transients must be delivered to the load, then bypass capacitors
–64.0
(typically greater than 1 µF) will be required to provide the best
+PSRR –66.5
settling time and lowest distortion. A parallel combination of 4.7 µF and 0.1 µF is recommended. Some brands of electrolytic
–69.0 –55 –35 –15 5 25 45 65 85 105 125
capacitors will require a small series damping resistor ≈ 4.7 Ω
JUNCTION TEMPERATURE –
°
C
for optimum results.
DC Errors and Noise
Figure 22. PSRR vs. Temperature There are three major noise and offset terms to consider in a current feedback amplifier. For offset errors refer to the equa- tion below. For noise error the terms are root-sum-squared to
0 V
give a net output error. In the circuit below (Figure 24) they are
IN = 200mV –4
input offset (VIO) which appears at the output multiplied by the noise gain of the circuit (1 + R
–14
F/RI), noninverting input current (IBN × RN) also multiplied by the noise gain, and the inverting
–24 –PSRR
input current, which when divided between RF and RI and sub-
–34
sequently multiplied by the noise gain always appears at the out- put as I × BN RF. The input voltage noise of the AD8079 is a low
–44 PSRR – dB +PSRR
2 nV/√Hz. At low gains though the inverting input current noise
–54
times RF is the dominant noise source. Careful layout and de- vice matching contribute to better offset and drift specifications
–64
for the AD8079 compared to many other current feedback am-
–74
plifiers. The typical performance curves in conjunction with the
–84
equations below can be used to predict the performance of the
30k 100k 1M 10M 100M 500M
AD8079 in any application.
FREQUENCY – Hz
    V =V × 1+ RF  × R × 1+ RF  × R Figure 23. PSRR vs. Frequency OUT IO N F  R  ± IBN  R  ± IBI I I where: RF = RI = 750 Ω for AD8079A RF = 750 Ω, RI = 625 Ω for AD8079B REV. A –7–