Datasheet AD8007, AD8008 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónUltralow Distortion, High Speed Amplifiers
Páginas / Página20 / 6 — AD8007/AD8008. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter Rating. …
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AD8007/AD8008. ABSOLUTE MAXIMUM RATINGS. Table 3. Parameter Rating. MAXIMUM POWER DISSIPATION. 2.0. ) W. ( N 1.5. MSOP-8. IPA. SOIC-8. ISS

AD8007/AD8008 ABSOLUTE MAXIMUM RATINGS Table 3 Parameter Rating MAXIMUM POWER DISSIPATION 2.0 ) W ( N 1.5 MSOP-8 IPA SOIC-8 ISS

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AD8007/AD8008 ABSOLUTE MAXIMUM RATINGS
RMS output voltages should be considered. If RL is referenced to
Table 3.
VS, as in single-supply operation, then the total drive power is
Parameter Rating
VS × IOUT. Supply Voltage 12.6 V If the rms signal levels are indeterminate, then consider the Power Dissipation See Figure 5 worst case, when V Common-Mode Input Voltage ±V OUT = VS/4 for RL to midsupply S Differential Input Voltage ±1.0 V ⎛ V 2 ⎞ S ⎜ ⎟ Output Short-Circuit Duration See Figure 5 ⎝ 4 ⎠ = × + Storage Temperature Range −65°C to +125°C P V ( I ) D S S RL Operating Temperature Range −40°C to +85°C Lead Temperature (Soldering, 10 sec) 300°C In single-supply operation, with RL referenced to VS, worst case is VOUT = VS/2. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress Airflow increases heat dissipation, effectively reducing θJA. In rating only; functional operation of the device at these or any addition, more metal directly in contact with the package leads other conditions above those indicated in the operational from metal traces, through-holes, ground, and power planes section of this specification is not implied. Exposure to absolute reduces the θJA. Care must be taken to minimize parasitic maximum rating conditions for extended periods may affect capacitances at the input leads of high speed op amps, see the device reliability. Layout Considerations section. Figure 5 shows the maximum safe power dissipation in the
MAXIMUM POWER DISSIPATION
package vs. the ambient temperature for the SOIC-8 (125°C/W), The maximum safe power dissipation in the AD8007/AD8008 MSOP-8 (150°C/W), and SC70-5 (210°C/W) packages on a packages is limited by the associated rise in junction temperature JEDEC standard 4-layer board. θJA values are approximations. (TJ) on the die. The plastic encapsulating the die locally reaches
2.0
the junction temperature. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties.
) W
Even temporarily exceeding this temperature limit can change
( N 1.5 O
the stresses that the package exerts on the die, permanently
TI MSOP-8
shifting the parametric performance of the AD8007/AD8008.
IPA SOIC-8 ISS
Exceeding a junction temperature of 175°C for an extended
D R 1.0 E
time can result in changes in the silicon devices, potentially
W O
causing failure.
M P SC70-5 IMU
The still-air thermal properties of the package and PCB (θJA),
X 0.5
ambient temperature (TA), and the total power dissipated in the
MA
package (PD) determine the junction temperature of the die.
0
The junction temperature can be calculated as
6 – 0 –40 –20 0 20 40 60 80 1 0 0
05 -0
AMBIENT TEMPERATURE (°C)
66 28 0 TJ = TA + (PD × θJA) Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the
OUTPUT SHORT CIRCUIT
package due to the load drive for all outputs. The quiescent Shorting the output to ground or drawing excessive current for power is the voltage between the supply pins (VS) times the the AD8007/AD8008 will likely cause catastrophic failure. quiescent current (IS). Assuming the load (RL ) is referenced to
ESD CAUTION
midsupply, the total drive power is VS/2 × IOUT, some of which is dissipated in the package and some in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power) ⎛ V V ⎞ V 2 S OUT OUT P = V ( × I ) + × − D S S ⎜⎜ ⎟⎟ 2 R R ⎝ L ⎠ L Rev. E | Page 6 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS VS = ±5 V VS = 5 V ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION OUTPUT SHORT CIRCUIT ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION USING THE AD8007/AD8008 Supply Decoupling for Low Distortion LAYOUT CONSIDERATIONS LAYOUT AND GROUNDING CONSIDERATIONS GROUNDING INPUT CAPACITANCE OUTPUT CAPACITANCE INPUT-TO-OUTPUT COUPLING EXTERNAL COMPONENTS AND STABILITY OUTLINE DIMENSIONS ORDERING GUIDE