The MCP63x family of operational amplifiers features high gain bandwidth product and high output short circuit current
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60 /8 — MCP631/2/3/4/5/9. Note:. 2.0. 130. V 1.5. ) B 125. 1.0. e (m. ag 0.5. …
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MCP631/2/3/4/5/9. Note:. 2.0. 130. V 1.5. ) B 125. 1.0. e (m. ag 0.5. 120. lt o. 0.0. op Ga 115. -0.5. ffset V. -L 110. t O -1.0. u p. -1.5. 105. C D. -2.0. 100. -50
MCP631/2/3/4/5/9Note: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to 5.5V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 2 kto VL, CL = 50 pF and CS = VSS. 2.0130) VDD = 2.5V V 1.5 Representative Part ) B 125d1.0 +125°C e (m( +85°C in VDD = 5.5V ag 0.5 +25°C 120lt o -40°C 0.0op Ga 115o V -0.5 DD = 2.5V ffset V-L 110ent O -1.0u pOp-1.5105InC D-2.0100.50505050-00.0.1.1.2.2.3.-50-250255075100125Input Common Mode Voltage (V)Ambient Temperature (°C)FIGURE 2-7: Input Offset Voltage vs. FIGURE 2-10: DC Open-Loop Gain vs. Common-Mode Voltage with VDD = 2.5V. Ambient Temperature. 2.0130 VDD = 5.5V V) 1.5 Representative Part ) VDD = 5.5V B 125(m 1.0de +125°C ( in 1200.5 +85°C ltag o +25°C 115V 0.0 -40°C p Ga VDD = 2.5V etoo-0.5110ffs-L nt O -1.0105u pOpe-1.5InC 100D-2.095.50505050505050-00.0.1.1.2.2.3.3.4.4.5.5.6.1.E1 +00201.E+1 03k1.E+0410k1.E1 +0500kInput Common Mode Voltage (V)Load Resistance (Ω)FIGURE 2-8: Input Offset Voltage vs. FIGURE 2-11: DC Open-Loop Gain vs. Common-Mode Voltage with VDD = 5.5V. Load Resistance. 1101.E-0810n V 105 DD = 5.5V ts VCM = VCMR_H 100B)rren1.E-091n95u(d CMRR, V R DD = 2.5V 90t CR CMRR, VDD = 5.5V ) I S B 85ffseA1.E-10100pP(p80RR,75M C10p701.E-11t Bias, O PSRR u | I 65p OS | In601.E-121p-50-25025507510012525456585105125Ambient Temperature (°C)Ambient Temperature (°C)FIGURE 2-9: CMRR and PSRR vs. FIGURE 2-12: Input Bias and Offset Ambient Temperature. Currents vs. Ambient Temperature with VDD = 5.5V. DS20002197C-page 8 2009-2014 Microchip Technology Inc. Document Outline 24 MHz, 2.5 mA Rail-to-Rail Output (RRO) Op Amps Features: Typical Applications: Design Aids: Description: Typical Application Circuit High Gain-Bandwidth Op Amp Portfolio Package Types 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Specifications DC Electrial Specifications AC Electrical Specifications Digital Electrical Specifications Temperature Specifications 1.3 Timing Diagram FIGURE 1-1: Timing Diagram. 1.4 Test Circuits FIGURE 1-2: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves 2.1 DC Signal Inputs FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Power Supply Voltage with VCM = 0V. FIGURE 2-4: Input Offset Voltage vs. Output Voltage. FIGURE 2-5: Low-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-6: High-Input Common-Mode Voltage Headroom vs. Ambient Temperature. FIGURE 2-7: Input Offset Voltage vs. Common-Mode Voltage with VDD = 2.5V. FIGURE 2-8: Input Offset Voltage vs. Common-Mode Voltage with VDD = 5.5V. FIGURE 2-9: CMRR and PSRR vs. Ambient Temperature. FIGURE 2-10: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-11: DC Open-Loop Gain vs. Load Resistance. FIGURE 2-12: Input Bias and Offset Currents vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-13: Input Bias Current vs. Input Voltage (below VSS). FIGURE 2-14: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +85°C. FIGURE 2-15: Input Bias and Offset Currents vs. Common-Mode Input Voltage with TA = +125°C. 2.2 Other DC Voltages and Currents FIGURE 2-16: Output Voltage Headroom vs. Output Current. FIGURE 2-17: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-18: Output Short-Circuit Current vs. Power Supply Voltage. FIGURE 2-19: Supply Current vs. Power Supply Voltage. FIGURE 2-20: Supply Current vs. Common-Mode Input Voltage. 2.3 Frequency Response FIGURE 2-21: CMRR and PSRR vs. Frequency. FIGURE 2-22: Open-Loop Gain vs. Frequency. FIGURE 2-23: Gain-Bandwidth Product and Phase Margin vs. Ambient Temperature. FIGURE 2-24: Gain-Bandwidth Product and Phase Margin vs. Common-Mode Input Voltage. FIGURE 2-25: Gain-Bandwidth Product and Phase Margin vs. Output Voltage. FIGURE 2-26: Closed-Loop Output Impedance vs. Frequency. FIGURE 2-27: Gain Peaking vs. Normalized Capacitive Load. FIGURE 2-28: Channel-to-Channel Separation vs. Frequency. 2.4 Noise and Distortion FIGURE 2-29: Input Noise Voltage Density vs. Frequency. FIGURE 2-30: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 100 Hz. FIGURE 2-31: Input Noise Voltage Density vs. Input Common-Mode Voltage with f = 1 MHz. FIGURE 2-32: Input Noise vs. Time with 0.1 Hz Filter. FIGURE 2-33: THD+N vs. Frequency. 2.5 Time Response FIGURE 2-34: Non-Inverting Small Signal Step Response. FIGURE 2-35: Non-Inverting Large Signal Step Response. FIGURE 2-36: Inverting Small Signal Step Response. FIGURE 2-37: Inverting Large Signal Step Response. FIGURE 2-38: The MCP631/2/3/4/5/9 Family Shows No Input Phase Reversal With Overdrive. FIGURE 2-39: Slew Rate vs. Ambient Temperature. FIGURE 2-40: Maximum Output Voltage Swing vs. Frequency. 2.6 Chip Select Response FIGURE 2-41: CS Current vs. Power Supply Voltage. FIGURE 2-42: CS and Output Voltages vs. Time with VDD = 2.5V. FIGURE 2-43: CS and Output Voltages vs. Time with VDD = 5.5V. FIGURE 2-44: CS Hysteresis vs. Ambient Temperature. FIGURE 2-45: CS Turn-On Time vs. Ambient Temperature. FIGURE 2-46: CS Pull-Down Resistor (RPD) vs. Ambient Temperature. FIGURE 2-47: Quiescent Current in Shutdown vs. Power Supply Voltage. FIGURE 2-48: Output Leakage Current vs. Output Voltage. 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Chip Select Digital Input (CS) 3.5 Exposed Thermal Pad (EP) 4.0 Applications 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Unity-Gain Voltage Limitations for Linear Operation. 4.2 Rail-to-Rail Output FIGURE 4-4: Output Current. FIGURE 4-5: Diagram for Power Calculations. 4.3 Improving Stability FIGURE 4-6: Output Resistor, RISO, Stabilizes Large Capacitive Loads. FIGURE 4-7: Recommended RISO Values for Capacitive Loads. FIGURE 4-8: Amplifier with Parasitic Capacitance. FIGURE 4-9: Maximum Recommended RF vs. Gain. 4.4 MCP633, MCP635 and MCP639 Chip Select 4.5 Power Supply 4.6 High-Speed PCB Layout 4.7 Typical Applications FIGURE 4-10: Power Driver. FIGURE 4-11: Transimpedance Amplifier for an Optical Detector. FIGURE 4-12: H-Bridge Driver. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Microchip Advanced Part Selector (MAPS) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service