Datasheet MCP6286 (Microchip) - 4
| Fabricante | Microchip |
| Descripción | The MCP6286 operational amplifier offers low noise, low power and rail-to-rail output operation |
| Páginas / Página | 28 / 4 — MCP6286. DC ELECTRICAL SPECIFICATIONS (CONTINUED). Electrical … |
| Formato / tamaño de archivo | PDF / 416 Kb |
| Idioma del documento | Inglés |
MCP6286. DC ELECTRICAL SPECIFICATIONS (CONTINUED). Electrical Characteristics. Parameters. Sym. Min. Typ. Max. Units. Conditions
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MCP6286 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3, V ≈ OUT VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions Power Supply
Supply Voltage VDD 2.2 — 5.5 V Quiescent Current per Amplifier IQ 300 520 700 µA IO = 0, VDD = 2.2V 320 540 720 µA IO = 0, VDD = 5.5V
Note 1:
Figure 2-12 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +2.2 to +5.5V, VSS = GND, VCM = VDD/3, V ≈ OUT VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions AC Response
Gain Bandwidth Product GBWP — 3.5 — MHz Phase Margin PM — 60 — ° G = +1 V/V Slew Rate SR — 2 — V/µs
Noise
Input Noise Voltage Eni — 1.0 — µVP-P f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 22 — nV/√Hz f = 10 Hz — 5.4 — nV/√Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +2.2V to +5.5V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C
Note 1
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23 θJA — 256 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C. DS22196A-page 4 © 2009 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Common Mode Input Voltage Headroom vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs Ambient Temperature. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 2.2V. FIGURE 2-22: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-Inverting Pulse Response. FIGURE 2-28: Small Signal Inverting Pulse Response. FIGURE 2-29: Large Signal Non-Inverting Pulse Response. FIGURE 2-30: Large Signal Inverting Pulse Response. FIGURE 2-31: The MCP6286 Shows No Phase Reversal. FIGURE 2-32: Closed Loop Output Impedance vs. Frequency. FIGURE 2-33: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-4: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout for Inverting Gain. 4.6 Application Circuits FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information
MCP6286 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics
: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3, V ≈ OUT VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions Power Supply
Supply Voltage VDD 2.2 — 5.5 V Quiescent Current per Amplifier IQ 300 520 700 µA IO = 0, VDD = 2.2V 320 540 720 µA IO = 0, VDD = 5.5V
Note 1:
Figure 2-12 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, TA = +25°C, VDD = +2.2 to +5.5V, VSS = GND, VCM = VDD/3, V ≈ OUT VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters Sym Min Typ Max Units Conditions AC Response
Gain Bandwidth Product GBWP — 3.5 — MHz Phase Margin PM — 60 — ° G = +1 V/V Slew Rate SR — 2 — V/µs
Noise
Input Noise Voltage Eni — 1.0 — µVP-P f = 0.1 Hz to 10 Hz Input Noise Voltage Density eni — 22 — nV/√Hz f = 10 Hz — 5.4 — nV/√Hz f = 10 kHz Input Noise Current Density ini — 0.6 — fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS Electrical Characteristics:
Unless otherwise indicated, VDD = +2.2V to +5.5V and VSS = GND.
Parameters Sym Min Typ Max Units Conditions Temperature Ranges
Operating Temperature Range TA -40 — +125 °C
Note 1
Storage Temperature Range TA -65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23 θJA — 256 — °C/W
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C. DS22196A-page 4 © 2009 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-5: Input Offset Voltage vs. Output Voltage. FIGURE 2-6: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_L. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage with VCM = VCMR_H. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Common Mode Input Voltage Headroom vs. Ambient Temperature. FIGURE 2-13: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-14: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs Ambient Temperature. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage with VDD = 2.2V. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 5.5V. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature with VDD = 2.2V. FIGURE 2-22: Ouput Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Slew Rate vs. Ambient Temperature. FIGURE 2-27: Small Signal Non-Inverting Pulse Response. FIGURE 2-28: Small Signal Inverting Pulse Response. FIGURE 2-29: Large Signal Non-Inverting Pulse Response. FIGURE 2-30: Large Signal Inverting Pulse Response. FIGURE 2-31: The MCP6286 Shows No Phase Reversal. FIGURE 2-32: Closed Loop Output Impedance vs. Frequency. FIGURE 2-33: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Output 3.2 Analog Inputs 3.3 Power Supply Pins 4.0 Application Information 4.1 Input FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-4: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 PCB Surface Leakage FIGURE 4-5: Example Guard Ring Layout for Inverting Gain. 4.6 Application Circuits FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab® Software 5.3 Mindi™ Circuit Designer & Simulator 5.4 Microchip Advanced Part Selector (MAPS) 5.5 Analog Demonstration and Evaluation Boards 5.6 Application Notes 6.0 Packaging Information 6.1 Package Marking Information