Datasheet MCP6H01, MCP6H02, MCP6H04 (Microchip) - 9

MCP6H01/2/4 Note:
Unless otherwise indicated, T  A = +25°C, VDD = +3.5V to +16V, VSS = GND, VCM = VDD/2 - 1.4V, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
1000 1 00 00n 120 0 T Open-Loop Gain ) A = +125°C 100 -30 10000 10n ) B t (A (d 80 -60 e (°) as rren 1000 1n ain Open-Loop Phase h 60 -90 P p G p as Cu o 10 1000p o 40 -120 oo TA = +85°C -L t Bi -L u en 20 -150 en p 10 p In 10p VDD = 15V Op O 0 -180 1 1p -20 -210 0 2 4 6 8 10 12 14 16 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 0.1 1 10 100 1k 10k 100k 1M 10M Common Mode Input Voltage (V) Frequency (Hz) FIGURE 2-13:
Input Bias Current vs.
FIGURE 2-16:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
200 160 190 ) B 150 180 t d 170 ( en 140 rr r) VDD = 15V 160 VDD = 5V ain u ie 130 lif 150 VDD = 3.5V G t C p p 140 o m 120 /A 130 110 iescen 120 en Lo u (µA p 110 Q 100 -O VSS + 0.2V < VOUT < VDD - 0.2V 100 C D 90 90 80 80 -50 -25 0 25 50 75 100 125 3 5 7 9 11 13 15 17 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
DC Open-Loop Gain vs. Ambient Temperature. Power Supply Voltage.
200 150 180 B) 140 t 160 (d 130 r) 140 ain rren u ie G 120 lif p 120 VDD = 15V t C p o n 100 o V m 110 L DD = 5V /A V 80 DD = 3.5V T en p 100 iesce A = +125°C (µA 60 u TA = +85°C O Q 40 T 90 A = +25°C T DC- 20 A = -40°C 80 0 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0 2 4 6 8 10 12 14 16 Output Voltage Headroom (V) Power Supply Voltage (V) VDD - VOH or VOL - VSS FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Power Supply Voltage. Output Voltage Headroom.  2010-2011 Microchip Technology Inc. DS22243D-page 9 Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-14: Quiescent Current vs. Ambient Temperature. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency (MCP6H02 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-30: Slew Rate vs. Ambient Temperature. FIGURE 2-31: Slew Rate vs. Ambient Temperature. FIGURE 2-32: Small Signal Non-Inverting Pulse Response. FIGURE 2-33: Small Signal Inverting Pulse Response. FIGURE 2-34: Large Signal Non-Inverting Pulse Response. FIGURE 2-35: Large Signal Inverting Pulse Response. FIGURE 2-36: The MCP6H01/2/4 Shows No Phase Reversal. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: High Side Current Sensing Using Difference Amplifier. FIGURE 4-9: Two Op Amp Instrumentation Amplifier. FIGURE 4-10: Photodetector Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Indianapolis Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service