Datasheet MCP6H01, MCP6H02, MCP6H04 (Microchip) - 8

MCP6H01/2/4 Note:
Unless otherwise indicated, T  A = +25°C, VDD = +3.5V to +16V, VSS = GND, VCM = VDD/2 - 1.4V, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 60 pF.
1000 120 ) 800 PSRR+ 110 Representative Part V 600 100 e (µ B) CMRR g 400 90 lta (d PSRR- 200 o T R 80 A = +125°C R t V 0 T S 70 e A = +85°C P -200 T ffs A = +25°C 60 T -400 A = -40°C RR, t O 50 M u p -600 C 40 In -800 Representative Part 30 -1000 20 0 2 4 6 8 10 12 14 16 18 10 10 100 100 1000 1k 100 00 10k 10000 0 100k 100 0000 1M Power Supply Voltage (V) Frequency (Hz) FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
CMRR, PSRR vs. Power Supply Voltage. Frequency.
1,000 130 sity 120
PSRR
en B) 110 e D ) (d R 100 ltag Hz R o

S 100 90 V CMRR @ V V/ P DD = 15V 80 @ V ise (n RR, DD = 5V @ V 70 DD = 3.5V t No CM u p 60 In 50 10 -50 -25 0 25 50 75 100 125 1 1 10 10 100 100 1 000 1k 1000 0 10k 100000 100k Frequency (Hz) Ambient Temperature (°C) FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
CMRR, PSRR vs. Ambient vs. Frequency. Temperature.
50 100000 100n ts sity 45 VDD = 15V rren en 10000 10n 40 e D t Cu Input Bias Current ) 35 e 1000 ltag ffs 1n o Hz /

30 O V d (A) (n 25 n 100 ise V a 100p o 20 f = 1 kHz as t N u VDD = 16V 10 10p p t Bi 15 u In p Input Offset Current 10 In 1 1p -1 1 3 5 7 9 11 13 15 5 25 35 45 55 65 75 85 95 5 5 10 11 12 Common Mode Input Voltage (V) Ambient Temperature (°C) FIGURE 2-9:
Input Noise Voltage Density
FIGURE 2-12:
Input Bias, Offset Currents vs. Common Mode Input Voltage. vs. Ambient Temperature. DS22243D-page 8  2010-2011 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings † 1.2 Test Circuits FIGURE 1-1: AC and DC Test Circuit for Most Specifications. 2.0 Typical Performance Curves FIGURE 2-1: Input Offset Voltage. FIGURE 2-2: Input Offset Voltage Drift. FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage. FIGURE 2-6: Input Offset Voltage vs. Output Voltage. FIGURE 2-7: Input Offset Voltage vs. Power Supply Voltage. FIGURE 2-8: Input Noise Voltage Density vs. Frequency. FIGURE 2-9: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-10: CMRR, PSRR vs. Frequency. FIGURE 2-11: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-12: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-13: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-14: Quiescent Current vs. Ambient Temperature. FIGURE 2-15: Quiescent Current vs. Power Supply Voltage. FIGURE 2-16: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. FIGURE 2-19: Channel-to-Channel Separation vs. Frequency (MCP6H02 only). FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-22: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-23: Output Voltage Swing vs. Frequency. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-26: Output Voltage Headroom vs. Output Current. FIGURE 2-27: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-28: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-29: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-30: Slew Rate vs. Ambient Temperature. FIGURE 2-31: Slew Rate vs. Ambient Temperature. FIGURE 2-32: Small Signal Non-Inverting Pulse Response. FIGURE 2-33: Small Signal Inverting Pulse Response. FIGURE 2-34: Large Signal Non-Inverting Pulse Response. FIGURE 2-35: Large Signal Inverting Pulse Response. FIGURE 2-36: The MCP6H01/2/4 Shows No Phase Reversal. FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. FIGURE 4-3: Protecting the Analog Inputs. 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps FIGURE 4-6: Unused Op Amps. 4.6 PCB Surface Leakage FIGURE 4-7: Example Guard Ring Layout for Inverting Gain. 4.7 Application Circuits FIGURE 4-8: High Side Current Sensing Using Difference Amplifier. FIGURE 4-9: Two Op Amp Instrumentation Amplifier. FIGURE 4-10: Photodetector Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Corporate Office Atlanta Boston Chicago Cleveland Fax: 216-447-0643 Dallas Detroit Indianapolis Toronto Fax: 852-2401-3431 Australia - Sydney China - Beijing China - Shanghai India - Bangalore Korea - Daegu Korea - Seoul Singapore Taiwan - Taipei Fax: 43-7242-2244-393 Denmark - Copenhagen France - Paris Germany - Munich Italy - Milan Spain - Madrid UK - Wokingham Worldwide Sales and Service