Datasheet LTC1041 (Analog Devices) - 4

LTC1041
W U TYPICAL PERFOR A CE CHARACTERISTICS VP-P Output Voltage vs Load Current RIN vs Sampling Frequency
) 0 Ω (V) 1011 ) P-P 0.2 – V+ 0.4 • 66pF) ( V S V+ = 16V 1010 0.6 (1/f V+ = 10V IN 0.8 1.0 109 V+ = 2.8V 1.2 1.4 V+ = 5V 108 1.6 1.8 TYPICAL OUTPUT VOLTAGE DROP ( 2.0 107 0 1 2 3 4 5 6 7 8 9 10 AVERAGE INPUT RESISTANCE, R 1 102 104 103 10 LOAD CURRENT, IL (mA) SAMPLING FREQUENCY fS (Hz) LTC1041 • TPC06 LTC1041 • TPC07
U U W U APPLICATIO S I FOR ATIO
The LTC1041 uses sampled data techniques to achieve the RS flip-flop is reset (ON/OFF = GND) when its unique characteristics. It consists of two comparators, VIN > (SET POINT + DELTA) and is set (ON/OFF = V+) when each of which has two differential inputs (Figure 1a). VIN < (SET POINT – DELTA). This makes a very precise When the sum of the voltages on a comparator’s inputs is hysteresis loop of 2 • DELTA centered around the positive, the output is high and when the sum is negative, SET POINT. (See Figure 1b.) the output is low. The inputs are interconnected such that
For RS < 10k
Ω V+ The dual differential input structure is made with CMOS VIN (8) + switches and a precision capacitor array. Input (2) – ON/OFF impedance characteristics of the LTC1041 can be + COMP A (1) – determined from the equivalent circuit shown in Figure 2. 4 The input capacitance will charge with a time constant of SET POINT SET POINT + DELTA – +DELTA (3) – V+ + COMP B DELTA (5) – DEADBAND V+ GND ON/OFF OUTPUT 4 (4) V+ REXT OSC TIMING (6) VP-P GENERATOR VP-P CIRCUIT (7) GND CEXT POWER ON 0V VL VU INPUT VOLTAGE, VIN 80µs LTC1041 • AI01a LTC1041 • AI01b
(a) (b) Figure 1. LTC1041 Block Diagram
1041fa 4