Datasheet LT1715 (Analog Devices) - 9

LT1715
APPLICATIONS INFORMATION Power Supply Confi gurations
input stage is run from –5.2V and ground while the output stage is run from 3V and ground. In this case the com- The LT1715 has separate supply pins for the input and mon mode input voltage range does not include ground, output stages that allow fl exible operation, accommodating so it may be helpful to tie V separate voltage ranges for the analog input and the output CC to 3V. Conversely, VCC may also be tied below ground, as long as the above rules are logic. Of course, a single 3V/5V supply may be used by not violated. tying +VS and VCC together as well as GND and VEE. The minimum voltage requirement can be simply stated
Input Voltage Considerations
as both the output and the input stages need at least 2.7V The LT1715 is specifi ed for a common mode range of and the VEE pin must be equal to or less than ground. –100mV to 3.8V when used with a single 5V supply. A The following rules must be adhered to in any confi guration: more general consideration is that the common mode range is 100mV below V 2.7V ≤ (V EE to 1.2V below VCC. The crite- CC – VEE) ≤ 12V rion for this common mode limit is that the output still 2.7V ≤ (+VS – GND) ≤ 6V responds correctly to a small differential input signal. If (+V one input is within the common mode limit, the other S – VEE)) ≤ 12V input signal can go outside the common mode limits, up VEE ≤ Ground to the absolute maximum limits, and the output will retain Although the ground pin need not be tied to system ground, the correct polarity. most applications will use it that way. Figure 1 shows three When either input signal falls below the negative common common confi gurations. The fi nal one is uncommon, but mode limit, the internal PN diode formed with the substrate it will work and may be useful as a level translator; the can turn on, resulting in signifi cant current fl ow through the die. An external Schottky clamp diode between the 2.7V TO 6V input and the negative rail can speed uprecovery from 5V negative overdrive by preventing the substrate diode from VCC VCC 3V turning on. + + +VS +VS When both input signals are below the negative common GND GND – – mode limit, phase reversal protection circuitry prevents VEE VEE false output inversion to at least –400mV common mode. –5V However, the offset and hysteresis in this mode will increase dramatically, to as much as 15mV each. The input bias
Single Supply
±
5V Input, 3V Output Supplies
currents will also increase. 12V When one input signal goes above the common mode range VCC 5V VCC 3V without exceeding a diode drop above the input supply rail, + + +VS +VS the input stage will remain biased and the comparator will maintain correct output polarity. Above this voltage, the GND GND – – input stage current source will saturate completely and VEE VEE the ESD protection diode will forward conduct. Once the –5.2V 1715 F01 aberrant input falls back into the common mode range,
12V Input, 5V Output Supplies Front End Entirely Negative
the comparator will respond correctly to valid input signals within less than 10ns.
Figure 1. Variety of Power Supply Confi gurations
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