Datasheet LT1011, LT1011A (Analog Devices) - 9

LT1011/LT1011A
applicaTions inForMaTion
This circuit is especially useful for general purpose
Input Protection
comparator applications because it does not force The inputs to the LT1011 are particularly suited to general any signals directly back onto the input signal source. purpose comparator applications because large differential Instead, it takes advantage of the unique properties and/or common mode voltages can be tolerated without of the BALANCE pins to provide extremely fast, clean damage to the comparator. Either or both inputs can be output switching even with low frequency input signals raised 40V above the negative supply, independent of the in the millivolt range. The 0.003µF capacitor from Pin positive supply voltage. Internal forward biased diodes 6 to Pin 8 generates AC hysteresis because the voltage will conduct when the inputs are taken below the negative on the BALANCE pins shifts slightly, depending on the supply. In this condition, input current must be limited to state of the output. Both pins move about 4mV. If one 1mA. If very large (fault) input voltages must be accom- pin (6) is bypassed, AC hysteresis is created. It is only modated, series resistors and clamp diodes should be a few millivolts referred to the inputs, but is sufficient used (see Figure 3). to switch the output at nearly the maximum speed of which the comparator is capable. To prevent problems 8 from low values of input slew rate, a slight amount of DC C8 TO C6 = 0.003µF 7 hysteresis is also used. The sensitivity of the BALANCE 6 pins to current is about 0.5mV input referred offset for 5 each microampere of BALANCE pin current. The 15M 4 resistor tied from OUTPUT to Pin 5 generates 0.5mV DC 3 hysteresis. The combination of AC and DC hysteresis 2 creates clean oscillation-free switching with very small 1 OUTPUT “LO” TO “HI” input errors. Figure 2 plots input referred error versus INPUT OFFSET VOLTAGE (mV) 0 OUTPUT “HI” TO “LO” switching frequency for the circuit as shown. –1 (50kHz) (5kHz) –2 Note that at low frequencies, the error is simply the 1 10 100 1000 TIME/FREQUENCY (µs) DC hysteresis, while at high frequencies, an addi- 1011 F02 tional error is created by the AC hysteresis. The high
Figure 2. Input Offset Voltage vs Time to Last Transition
frequency error can be reduced by reducing CH, but lower values may not provide clean switching with very low slew rate input signals. V+ R3* D1 D2 R1** 300Ω 3 – 8 INPUTS R4* LT1011 R2** 300Ω 2 + 4 D3 D4 D1 TO D4: 1N4148 V– *MAY BE ELIMINATED FOR IFAULT ≤ 1mA **SELECT ACCORDING TO ALLOWABLE FAULT CURRENT AND POWER DISSIPATION 1011 F03
Figure 3. Limiting Fault Input Currents
1011afe For more information www.linear.com/LT1011 9 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Applications Information Typical Applications Schematic Diagram Package Description Revision History Typical Application Related Parts