Datasheet AD711 (Analog Devices) - 6

AD711 125 100 100 110 RL = 2k 100 25 C PHASE 120 80 80 +SUPPLY 80 115 60 60 –SUPPLY GAIN 60 110 40 40 Y REJECTION – dB 40 105 20 20 OPEN LOOP GAIN – dB OPEN-LOOP GAIN – dB V RL = 2k PHASE MARGIN – Degrees WER SUPPL S = 15 SUPPLIES 100 20 0 0 WITH 1V p-p SINE C = 100pF PO WAVE 25 C 95 –20 –20 0 0 5 10 15 20 10 100 1k 10k 100k 1M 10M 1 10 100 1k 10k 10k SUPPLY VOLTAGE – FREQUENCY – Hz Volts SUPPLY MODULATION FREQUENCY – Hz
TPC 10. Open-Loop Gain and TPC 11. Open-Loop Gain vs. TPC 12. Power Supply Rejection Phase Margin vs. Frequency Supply Voltage vs. Frequency
100 30 2 V R S = 15V L = 2k 8 V 25 C lts CM = 1V p-p 25 80 V Vo 25 C S = 15V 6 p-p O lts 4 o 20 60 – V 2 1% 0.1% 0.01% GE 15 0 LTA O ERROR 1% 0.1% 0.01% CMR – dB 40 –2 10 –4 20 –6 OUTPUT V 5 OUTPUT SWING FRIM 0V T –8 0 0 –10 10 100 1k 10k 100k 1M 100k 1M 10M 0.5 0.6 0.7 0.8 0.9 1.0 FREQUENCY – Hz INPUT FREQUENCY – Hz SETTLING TIME – s
TPC 13. Common Mode Rejection TPC 14. Large Signal Frequency TPC 15. Output Swing and Error vs. Frequency Response vs. Settling Time
–70 1k 25 3V RMS –80 RL = 2k Hz 20 CL = 100pF s –90 100 V GE – nV/ 15 – LTA –100 O V THD – dB 10 –110 10 SLEW RATE 5 –120 INPUT NOISE –130 1 0 100 1k 10k 100k 1 10 100 1k 10k 100k 0 100 200 300 400 500 600 700 800 900 FREQUENCY – Hz FREQUENCY – Hz INPUT ERROR SIGNAL – mV (AT SUMMING JUNCTION)
TPC 16. Total Harmonic Distor- TPC 17. Input Noise Voltage TPC 18. Slew Rate vs. Input tion vs. Frequency Spectral Density Error Signal REV. E –5– Document Outline FEATURES PRODUCT DESCRIPTION CONNECTION DIAGRAMS PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Typical Performance Characteristics OPTIMIZING SETTLING TIME OP AMP SETTLING TIME—A MATHEMATICAL MODEL GUARDING D/A CONVERTER APPLICATIONS NOISE CHARACTERISTICS DRIVING THE ANALOG INPUT OF AN A/D CONVERTER DRIVING A LARGE CAPACITIVE LOAD ACTIVE FILTER APPLICATIONS SECOND ORDER LOW PASS FILTER 9-POLE CHEBYCHEV FILTER OUTLINE DIMENSIONS Revision History