Datasheet ADA4350 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | FET Input Analog Front End with ADC Driver |
| Páginas / Página | 38 / 3 — ADA4350. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 3/16—Rev. A to … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 813 Kb |
| Idioma del documento | Inglés |
ADA4350. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 3/16—Rev. A to Rev. B. 12/15—Rev. 0 to Rev. A
Versión de texto del documento
link to page 1 link to page 1 link to page 1 link to page 1 link to page 3 link to page 4 link to page 4 link to page 5 link to page 6 link to page 7 link to page 9 link to page 10 link to page 11 link to page 12 link to page 14 link to page 16 link to page 16 link to page 16 link to page 16 link to page 17 link to page 18 link to page 18 link to page 20 link to page 23 link to page 27 link to page 28 link to page 28 link to page 29 link to page 29 link to page 29 link to page 29 link to page 29 link to page 29 link to page 31 link to page 33 link to page 35 link to page 36 link to page 37 link to page 37 link to page 38 link to page 38
ADA4350 Data Sheet TABLE OF CONTENTS
Features .. 1 Typical Performance Characterisitics .. 17 Applications ... 1 Full System .. 17 General Description ... 1 FET Input Amplifier .. 19 Functional Block Diagram .. 1 ADC Driver ... 22 Revision History ... 2 Test Circuits ... 26 Specifications ... 3 Theory of Operation .. 27 ±5 V Full System ... 3 Kelvin Switching Techniques .. 27 ±5 V FET Input Amplifier ... 4 Applications Information .. 28 ±5 V Internal Switching Network and Digital Pins ... 5 Configuring the ADA4350 .. 28 ±5 V ADC Driver ... 6 Selecting the Transimpedance Gain Paths Manually or 5 V Full System ... 8 Through the Paral el Interface .. 28 5 V FET Input Amplifier ... 9 Selecting the Transimpedance Gain Paths Through the SPI Interface (Serial Mode) ... 28 5 V Internal Switching Network and Digital Pins .. 10 SPICE Model ... 30 5 V ADC Driver .. 11 Transimpedance Amplifier Design Theory .. 32 Timing Specifications .. 13 Transimpedance Gain Amplifier Performance .. 34 Absolute Maximum Ratings .. 15 The Effect of Low Feedback Resistor RFx .. 35 Thermal Resistance .. 15 Using The T Network to Implement Large Feedback Maximum Power Dissipation ... 15 Resistor Values .. 36 ESD Caution .. 15 Outline Dimensions ... 37 Pin Configuration and Function Descriptions ... 16 Ordering Guide .. 37
REVISION HISTORY 3/16—Rev. A to Rev. B
Change to Table 15 ... 29
12/15—Rev. 0 to Rev. A
Changes to Table 1 .. 3 Changes to Table 5 .. 8 Deleted Figure 4; Renumbered Sequentially ... 14 Changes to Table 10 .. 15 Changes to Table 14 .. 29
4/15—Revision 0: Initial Version
Rev. B | Page 2 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ±5 V FULL SYSTEM ±5 V FET INPUT AMPLIFIER ±5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS ±5 V ADC DRIVER 5 V FULL SYSTEM 5 V FET INPUT AMPLIFIER 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS 5 V ADC DRIVER TIMING SPECIFICATIONS Timing Diagrams for Serial Mode ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISITICS FULL SYSTEM FET INPUT AMPLIFIER ADC DRIVER TEST CIRCUITS THEORY OF OPERATION KELVIN SWITCHING TECHNIQUES APPLICATIONS INFORMATION CONFIGURING THE ADA4350 SELECTING THE TRANSIMPEDANCE GAIN PATHS MANUALLY OR THROUGH THE PARALLEL INTERFACE SELECTING THE TRANSIMPEDANCE GAIN PATHS THROUGH THE SPI INTERFACE (SERIAL MODE) SPICE MODEL TRANSIMPEDANCE AMPLIFIER DESIGN THEORY TRANSIMPEDANCE GAIN AMPLIFIER PERFORMANCE THE EFFECT OF LOW FEEDBACK RESISTOR RFx USING THE T NETWORK TO IMPLEMENT LARGE FEEDBACK RESISTOR VALUES OUTLINE DIMENSIONS ORDERING GUIDE
ADA4350 Data Sheet TABLE OF CONTENTS
Features .. 1 Typical Performance Characterisitics .. 17 Applications ... 1 Full System .. 17 General Description ... 1 FET Input Amplifier .. 19 Functional Block Diagram .. 1 ADC Driver ... 22 Revision History ... 2 Test Circuits ... 26 Specifications ... 3 Theory of Operation .. 27 ±5 V Full System ... 3 Kelvin Switching Techniques .. 27 ±5 V FET Input Amplifier ... 4 Applications Information .. 28 ±5 V Internal Switching Network and Digital Pins ... 5 Configuring the ADA4350 .. 28 ±5 V ADC Driver ... 6 Selecting the Transimpedance Gain Paths Manually or 5 V Full System ... 8 Through the Paral el Interface .. 28 5 V FET Input Amplifier ... 9 Selecting the Transimpedance Gain Paths Through the SPI Interface (Serial Mode) ... 28 5 V Internal Switching Network and Digital Pins .. 10 SPICE Model ... 30 5 V ADC Driver .. 11 Transimpedance Amplifier Design Theory .. 32 Timing Specifications .. 13 Transimpedance Gain Amplifier Performance .. 34 Absolute Maximum Ratings .. 15 The Effect of Low Feedback Resistor RFx .. 35 Thermal Resistance .. 15 Using The T Network to Implement Large Feedback Maximum Power Dissipation ... 15 Resistor Values .. 36 ESD Caution .. 15 Outline Dimensions ... 37 Pin Configuration and Function Descriptions ... 16 Ordering Guide .. 37
REVISION HISTORY 3/16—Rev. A to Rev. B
Change to Table 15 ... 29
12/15—Rev. 0 to Rev. A
Changes to Table 1 .. 3 Changes to Table 5 .. 8 Deleted Figure 4; Renumbered Sequentially ... 14 Changes to Table 10 .. 15 Changes to Table 14 .. 29
4/15—Revision 0: Initial Version
Rev. B | Page 2 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ±5 V FULL SYSTEM ±5 V FET INPUT AMPLIFIER ±5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS ±5 V ADC DRIVER 5 V FULL SYSTEM 5 V FET INPUT AMPLIFIER 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS 5 V ADC DRIVER TIMING SPECIFICATIONS Timing Diagrams for Serial Mode ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISITICS FULL SYSTEM FET INPUT AMPLIFIER ADC DRIVER TEST CIRCUITS THEORY OF OPERATION KELVIN SWITCHING TECHNIQUES APPLICATIONS INFORMATION CONFIGURING THE ADA4350 SELECTING THE TRANSIMPEDANCE GAIN PATHS MANUALLY OR THROUGH THE PARALLEL INTERFACE SELECTING THE TRANSIMPEDANCE GAIN PATHS THROUGH THE SPI INTERFACE (SERIAL MODE) SPICE MODEL TRANSIMPEDANCE AMPLIFIER DESIGN THEORY TRANSIMPEDANCE GAIN AMPLIFIER PERFORMANCE THE EFFECT OF LOW FEEDBACK RESISTOR RFx USING THE T NETWORK TO IMPLEMENT LARGE FEEDBACK RESISTOR VALUES OUTLINE DIMENSIONS ORDERING GUIDE