Datasheet AD8295 (Analog Devices) - 6

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AD8295 A Grade B Grade Parameter Test Conditions Min Typ Max Min Typ Max Unit
INPUT Input Impedance Differential 100||2 100||2 GΩ||pF Common Mode 100||2 100||2 GΩ||pF Input Operating Voltage Range1 VS = ±2.3 V to ±5 V −VS + 1.9 +VS − 1.1 −VS + 1.9 +VS − 1.1 V Over Temperature TA = −40°C to +85°C −VS + 2.0 +VS − 1.2 −VS + 2.0 +VS − 1.2 V Input Operating Voltage Range1 VS = ±5 V to ±18 V −VS + 1.9 +VS − 1.2 −VS + 1.9 +VS − 1.2 V Over Temperature TA = −40°C to +85°C −VS + 2.0 +VS − 1.2 −VS + 2.0 +VS − 1.2 V OUTPUT RL = 10 kΩ Output Swing VS = ±2.3 V to ±5 V −VS + 1.1 +VS − 1.2 −VS + 1.1 +VS − 1.2 V Over Temperature TA = −40°C to +85°C −VS + 1.4 +VS − 1.3 −VS + 1.4 +VS − 1.3 V Output Swing VS = ±5 V to ±18 V −VS + 1.2 +VS − 1.4 −VS + 1.2 +VS − 1.4 V Over Temperature TA = −40°C to +85°C −VS + 1.6 +VS − 1.5 −VS + 1.6 +VS − 1.5 V Short-Circuit Current 18 18 mA 1 One input grounded; G = 1.
OP AMP SPECIFICATIONS
VS = ±15 V, TA = 25°C, RL = 2 kΩ, unless otherwise noted.
Table 3. A Grade B Grade Parameter Test Conditions Min Typ Max Min Typ Max Unit
INPUT CHARACTERISTICS Offset Voltage, VOS 40 150 20 100 μV Average TC TA = −40°C to +85°C 5 5 μV/°C Input Bias Current1 6 10 6 10 nA TA = −40°C 10 13 10 13 nA TA = +85°C 4 8 4 8 nA Input Offset Current 0.6 0.6 nA Over Temperature TA = −40°C to +85°C 0.6 0.6 nA Input Voltage Range −VS + 1.2 +VS − 1.2 −VS + 1.2 +VS − 1.2 V Open-Loop Gain 100 125 116 125 dB Common-Mode Rejection Ratio 100 100 dB (CMRR) Power Supply Rejection Ratio 90 110 94 110 dB (PSRR) Voltage Noise Density 40 40 nV/√Hz Voltage Noise f = 0.1 Hz to 10 Hz 2.2 2.2 μV p-p DYNAMIC PERFORMANCE Gain Bandwidth Product 1 1 MHz Slew Rate 2 2.6 2 2.6 V/μs OUTPUT CHARACTERISTICS Output Swing VS = ±2.3 V to ±5 V −VS + 1.1 +VS − 1.2 −VS + 1.1 +VS − 1.2 V Over Temperature TA = −40°C to +85°C −VS + 1.4 +VS − 1.3 −VS + 1.4 +VS − 1.3 V Output Swing VS = ±5 V to ±18 V −VS + 1.2 +VS − 1.4 −VS + 1.2 +VS − 1.4 V Over Temperature TA = −40°C to +85°C −VS + 1.6 +VS − 1.5 −VS + 1.6 +VS − 1.5 V Short-Circuit Current 18 18 mA 1 Op amp uses an npn input stage, so input bias current always flows into the inputs. Rev. A | Page 5 of 28 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INSTRUMENTATION AMPLIFIER SPECIFICATIONS, SINGLE-ENDED AND DIFFERENTIAL OUTPUT CONFIGURATIONS OP AMP SPECIFICATIONS INTERNAL RESISTOR NETWORK POWER AND TEMPERATURE SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS IN-AMP OP AMPS SYSTEM THEORY OF OPERATION UNCOMMITTED OP AMPS INSTRUMENTATION AMPLIFIER Gain Selection Common-Mode Input Voltage Range Reference Terminal LAYOUT Routing and Vias Common-Mode Rejection over Frequency Unused Op Amps Reference Power Supplies INPUT PROTECTION INPUT BIAS CURRENT RETURN PATH RF INTERFERENCE DIFFERENTIAL OUTPUT APPLICATIONS INFORMATION CREATING A REFERENCE VOLTAGE AT MIDSCALE HIGH ACCURACY G = −1 CONFIGURATION WITH LOW-PASS FILTER TWO-POLE SALLEN-KEY FILTER AC-COUPLED INSTRUMENTATION AMPLIFIER DRIVING DIFFERENTIAL ADCs OUTLINE DIMENSIONS ORDERING GUIDE