Datasheet EP1C6Q240C7N - Altera — Ficha de datos

Part Number: EP1C6Q240C7N

Descripción detallada

Manufacturer: Altera

Docket:
Section I.

Cyclone FPGA Family Data Sheet
This section provides designers with the data sheet specifications for Cyclone® devices. The chapters contain feature definitions of the internal architecture, configuration and JTAG boundary-scan testing information, DC operating conditions, AC timing parameters, a reference to power consumption, and ordering information for Cyclone devices. This section contains the following chapters:
Chapter 1. Introduction Chapter 2. Cyclone Architecture Chapter 3. Configuration and Testing Chapter 4. DC and Switching Characteristics Chapter 5. Reference and Ordering Information
Revision History
Refer to each chapter for its own specific revision history. For information on when each chapter was updated, refer to the Chapter Revision Dates section, which appears in the complete handbook.

Specifications:

Clock Management: PLL
Family Type: Cyclone
Number of I/O Lines: 185
Number of Logic Blocks: 598
Number of Macrocells: 5980
Number of Speed Grades: 7
Operating Frequency Max: 320 MHz
Series: Cyclone
Total RAM Bits: 92.16Kbit

RoHS: Yes