Datasheet Texas Instruments ADS8372IBRHPT — Ficha de datos

FabricanteTexas Instruments
SerieADS8372
Numero de parteADS8372IBRHPT
Datasheet Texas Instruments ADS8372IBRHPT

ADC serie de 600 bits de 16 bits con referencia y pseudo bipolar, entrada totalmente diferencial 28-VQFN -40 a 85

Hojas de datos

16-Bit 600-kHz Fully Diff Pseudo-Bipolar Input Micropower Sampling ADC datasheet
PDF, 1.3 Mb, Archivo publicado: jun 24, 2005
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNo

Embalaje

Pin2828
Package TypeRHPRHP
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingADS8372IB
Width (mm)66
Length (mm)66
Thickness (mm).9.9
Pitch (mm).65.65
Max Height (mm)11
Mechanical DataDescargarDescargar

Paramétricos

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)2.7 V
INL(Max)0.75 +/-LSB
Input Range(Max)4.2 V
Input Range(Min)-4.2 V
Input TypeDifferential
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVQFN
Package Size: mm2:W x L28VQFN: 36 mm2: 6 x 6(VQFN) PKG
Power Consumption(Typ)110 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD93.5 dB
SNR93.5 dB
Sample Rate (max)600kSPS SPS
Sample Rate(Max)0.6 MSPS
THD(Typ)-116 dB

Plan ecológico

RoHSObediente

Kits de diseño y Módulos de evaluación

  • Evaluation Modules & Boards: ADS8372EVM
    ADS8372EVM Evaluation Module
    Estado del ciclo de vida: Activo (Recomendado para nuevos diseños)

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)