Datasheet Microchip PL133-37TI-R — Ficha de datos

PL133-37
Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC
FEATURES DESCRIPTION 3 LVCMOS Outputs 12mA Output Drive Strength Input/Output Frequency:
o Reference Clock: 1MHz to 150MHz Supports LVCMOS or Sine Wave Input Clock Very Low Jitter and Phase Noise Low Current Consumption Single 1.8V, 2.5V, or 3.3V, В±10% Power Supply Operating Temperature Range
o 0В°C to 70В°C (Commercial)
o -40В°C to 85В°C (Industrial) Available in SOT23-6L GREEN/RoHS Compliant
Packages The PL133-37 is an advanced fanout buffer design
for high performance, low-power, small form-factor
applications. The PL133-37 accepts a reference
clock input of 1MHz to 150MHz and produces three
outputs of the same frequency. Reference clock inputs may be LVCMOS or sine-wave signals (the inputs are internally AC-coupled). Offered in a small
3mm x 3mm SOT23, the PL133-37 offers the best
phase noise and jitter performance and lowest power
consumption of any comparable IC. PACKAGE PIN CONFIGURATION
CLK1 1 6 CLK2 GND 2 5 VDD FIN 3 4 CLK0 SOT23-6L BLOCK DIAGRAM CLK0
FIN CLK1
CLK2 Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944-0800 fax +1(408) 474-1000 www.micrel.com Rev 02/24/15 Page 1 PL133-37
Low-Power, 1.62V to 3.63V, 1MHz to 150MHz, 1:3 Fanout Buffer IC
PIN DESCRIPTION
Name Package Pin #
SOT23-6L Type Description CLK1 1 O Output clock GND 2 P Ground connection FIN 3 I Reference clock input CLK0 4 O Output clock VDD 5 P Power supply CLK2 6 O Output clock LAYOUT RECOMMENDATIONS
The following guidelines are to assist you with a performance optimized PCB design:
Signal Integrity and Termination Considerations Decoupling and Power Supply Considerations -Keep traces short! -Place decoupling capacitors as close as possible to …