Datasheet Intersil KAD5514P-17Q48 — Ficha de datos

DATASHEET
KAD5514P FN6804
Rev 3.00
May 31, 2016 14-Bit, 250/210/170/125MSPS ADC
The KAD5514P is a family of low-power, high performance
14-bit, analog-to-digital converters. Designed with Intersil’s
proprietary FemtoChargeв„ў technology on a standard CMOS
process, the family supports sampling rates of up to
250MSPS. The KAD5514P is part of a pin-compatible portfolio
of 10, 12 and 14-bit A/Ds with sample rates ranging from
125MSPS to 500MSPS. Features A Serial Peripheral Interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset. Selectable clock divider: Г 1, Г 2 or Г 4 Digital output data is presented in selectable LVDS or CMOS
formats. The KAD5514P is available in 72 Ld and 48 Ld QFN
packages with an exposed paddle. Operating from a 1.8V
supply, performance is specified across the full industrial
temperature range (-40°C to +85°C). Two’s complement, gray code or binary data format Key Specifications Pb-free (RoHS compliant) Programmable gain, offset and skew control 950MHz analog input bandwidth 60fs clock jitter Over-range indicator Clock phase selection Nap and sleep modes DDR LVDS-compatible or LVCMOS outputs Programmable built-in test patterns Single-supply 1.8V operation SNR = 69.4dBFS for fIN = 105MHz (-1dBFS) Applications SFDR = 82.2dBc for fIN = 105MHz (-1dBFS) Power amplifier linearization Total Power Consumption
-429/345mW at 250/125MSPS (SDR Mode)
-390/309mW at 250/125MSPS (DDR Mode) Radar and satellite antenna array processing Broadband communications High-performance data acquisition Communications test equipment C LK P OVDD AVDD CLKDIV WiMAX and microwave receivers C LK O U TP C LO C K
G E N E R A TIO N CLKN C LK O U TN D [13:0]P
14-B IT
250 M S P S
ADC + …