Datasheet Microchip ATMEGA8A-AUR — Ficha de datos

AVR 8-Bit Microcontroller
ATmega8A Data Sheet
Introduction
В® The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves
throughputs close to 1 MIPS per MHz. This empowers system designer to optimize the device for power
consumption versus processing speed. Features High-performance, Low-power AVR 8-bit Microcontroller
Advanced RISC Architecture
– 130 powerful instructions -most single-clock cycle execution
– 32 x 8 general purpose working registers
– Fully static operation
– Up to 16 MIPS throughput at 16 MHz
– On-chip 2-cycle multiplier
High Endurance Nonvolatile Memory segments
– 8 KB of In-System Self-programmable Flash program memory
– 512B EEPROM
– 1 KB internal SRAM
– Write/erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional boot code section with independent lock bits In-system programming by on-chip boot program True read-while-write operation
– Programming lock for software security
В®
Microchip QTouch library support …

ATmega8A
Low-Power AVR 8-bit Microcontroller Data Sheet Summary
Introduction
В® The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves
throughputs close to 1 MIPS per MHz. This empowers system designers to optimize the device for power
consumption versus processing speed. Features High-performance, Low-power AVR 8-bit Microcontroller
Advanced RISC Architecture
– 130 powerful instructions -most single-clock cycle execution
– 32 x 8 general purpose working registers
– Fully static operation
– Up to 16 MIPS throughput at 16 MHz
– On-chip 2-cycle multiplier
High Endurance Nonvolatile Memory segments
– 8 KB of In-System Self-programmable Flash program memory
– 512B EEPROM
– 1 KB internal SRAM
– Write/erase cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional boot code section with independent lock bits In-system programming by on-chip boot program True read-while-write operation
– Programming lock for software security
В®
Microchip QTouch library support …