Datasheet Texas Instruments TMS320DM335 — Ficha de datos

FabricanteTexas Instruments
SerieTMS320DM335
Datasheet Texas Instruments TMS320DM335

Sistema de medios digitales en chip (DMSoC)

Hojas de datos

TMS320DM335 Digital Media System-on-Chip (DMSoC) datasheet
PDF, 1.2 Mb, Revisión: C, Archivo publicado: jun 24, 2010
Extracto del documento

Precios

Estado

TMS320DM335CZCE216TMS320DM335DZCE135TMS320DM335DZCE216TMS320DM335ZCE270TMS320DM335ZCEA135TMS320DM335ZCEA216
Estado del ciclo de vidaNRND (No recomendado para nuevos diseños)NRND (No recomendado para nuevos diseños)NRND (No recomendado para nuevos diseños)NRND (No recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNo

Embalaje

TMS320DM335CZCE216TMS320DM335DZCE135TMS320DM335DZCE216TMS320DM335ZCE270TMS320DM335ZCEA135TMS320DM335ZCEA216
N123456
Pin337337337337337337
Package TypeZCEZCEZCEZCEZCEZCE
Industry STD TermNFBGANFBGANFBGANFBGANFBGANFBGA
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-N
Device MarkingDM335CZCE135TMS320TMS320TMS320A216
Width (mm)131313131313
Length (mm)131313131313
Thickness (mm).89.89.89.89.89.89
Pitch (mm).65.65.65.65.65.65
Max Height (mm)1.31.31.31.31.31.3
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargar
Package QTY160160

Plan ecológico

TMS320DM335CZCE216TMS320DM335DZCE135TMS320DM335DZCE216TMS320DM335ZCE270TMS320DM335ZCEA135TMS320DM335ZCEA216
RoHSDesobedienteDesobedienteObedienteObedienteDesobedienteDesobediente
Pb gratisNoNoNoNo

Notas de aplicación

  • Implementing DDR2/mDDR PCB Layout on the TMS320DM335 DMSoC (Rev. D)
    PDF, 127 Kb, Revisión: D, Archivo publicado: nov 11, 2009
    This application report contains implementation instructions for the DDR2/mDDR interface contained on the TMS320DM335 Digital Media System-on-Chip (DMSoC) device. The approach to specifying interface timing for the DDR2/mDDR interface is quite different than on previous devices.The previous approach specified device timing in terms of data sheet specifications and simulation models. The syste
  • TMS320DM355/335 Migration Guide (Silicon revision 1.1, 1.3 and 1.4) (Rev. B)
    PDF, 75 Kb, Revisión: B, Archivo publicado: enero 5, 2011
    This application report describes the differences between Silicon revision 1.1, 1.3 and 1.4 of the TMS320DM355/DM335 digital media system-on-chip (DMSoC). This document discusses behavior different from that described in the TMS320DM355 Digital Media System-on-Chip (DMSoC) ARM Subsystem User's Guide (SPRUFB3) and the TMS320DM335 Digital Med
  • Powering the TMS320DM335 and TMS320DM355 with the TPS650061
    PDF, 144 Kb, Archivo publicado: oct 13, 2011
    TPS650061, TMS320DM335, TMS320DM355 Powering the DM335 and DM355 with the TPS650061
  • TMS320DM355 DSP Power Reference Design PR742 (Rev. A)
    PDF, 199 Kb, Revisión: A, Archivo publicado: agosto 8, 2008
    This reference design is for the TMS320DM335/DM355 digital signal processor (DSP) and accounts for voltage, current, and sequencing requirements. The operating input voltage ranges from 2 V to 5.5 V for Li-ion batteries and 3 AA batteries. This design also can work with 2 AA batteries with some limitations. The design is optimized for efficiency over the full range of operation and low overall cos
  • Building a Small Embedded Linux Kernel Example (Rev. A)
    PDF, 1.3 Mb, Revisión: A, Archivo publicado: mayo 27, 2008
    Building a Small Embedded Linux Kernel Example Application Report
  • EDMA v2.0 to EDMA v3.0 (EDMA3) Migration Guide (Rev. A)
    PDF, 292 Kb, Revisión: A, Archivo publicado: agosto 21, 2008
    This application report summarizes the key differences between the enhanced direct memory access (EDMA3) used on C64x+в„ў DSP devices and the EDMA2 used on TMS320C64xв„ў DSP devices, and provides guidance for migrating from EDMA2 to EDMA3.
  • Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
    PDF, 93 Kb, Revisión: A, Archivo publicado: jul 17, 2008
    This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa
  • High-Speed Interface Layout Guidelines (Rev. G)
    PDF, 814 Kb, Revisión: G, Archivo publicado: jul 27, 2017
    As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.

Linea modelo

Clasificación del fabricante

  • Semiconductors> Processors> Digital Signal Processors> Media Processors > DaVinci Video Processors