Datasheet Texas Instruments TLV2548M — Ficha de datos

FabricanteTexas Instruments
SerieTLV2548M
Datasheet Texas Instruments TLV2548M

12-Bit 200 kSPS ADC Ser. Salida, Auto Pwrdn (S / W y H / W), Baja potencia W / 8 x FIFO W / 8 Ch.

Hojas de datos

3-V to 5.5-V, 12-Bit, 200-KSPS, 4-/8-Channel, Low-Power Serial Analog-to-Digital datasheet
PDF, 1.6 Mb, Revisión: F, Archivo publicado: oct 7, 2009
Extracto del documento

Precios

Estado

5962-9957001Q2ATLV2548MFKB
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

5962-9957001Q2ATLV2548MFKB
N12
Pin2020
Package TypeFKFK
Industry STD TermLCCCLCCC
JEDEC CodeS-CQCC-NS-CQCC-N
Package QTY11
CarrierTUBETUBE
Device MarkingTLV2548TLV2548
Width (mm)8.898.89
Length (mm)8.898.89
Thickness (mm)1.831.83
Pitch (mm)1.271.27
Max Height (mm)2.032.03
Mechanical DataDescargarDescargar

Paramétricos

Parameters / Models5962-9957001Q2A
5962-9957001Q2A
TLV2548MFKB
TLV2548MFKB
# Input Channels88
Analog Voltage AVDD(Max), V5.55.5
Analog Voltage AVDD(Min), V33
ArchitectureSARSAR
Digital Supply(Max), V5.55.5
Digital Supply(Min), V33
ENOB, Bits11.611.6
INL(Max), +/-LSB1.21.2
InterfaceSPISPI
Operating Temperature Range, C-55 to 125-55 to 125
Package GroupLCCCLCCC
Package Size: mm2:W x L, PKG20LCCC: 79 mm2: 8.89 x 8.89(LCCC)20LCCC: 79 mm2: 8.89 x 8.89(LCCC)
Power Consumption(Typ), mW3.33.3
RatingMilitaryMilitary
Reference ModeExt,IntExt,Int
Resolution, Bits1212
SFDR, dB8484
SNR, dB7070
Sample Rate (max), SPS200kSPS200kSPS

Plan ecológico

5962-9957001Q2ATLV2548MFKB
RoHSSee ti.comSee ti.com

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Serie: TLV2548M (2)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters