Datasheet Texas Instruments TLV1571 — Ficha de datos

Fabricante	Texas Instruments
Serie	TLV1571

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	TLV1571CDW	TLV1571IDW	TLV1571IDWG4	TLV1571IPW
# Input Channels	1	1	1	1
Analog Voltage AVDD(Max), V	5.5	5.5	5.5	5.5
Analog Voltage AVDD(Min), V	2.7	2.7	2.7	2.7
Architecture	SAR	SAR	SAR	SAR
Digital Supply(Max), V	5.5	5.5	5.5	5.5
Digital Supply(Min), V	2.7	2.7	2.7	2.7
INL(Max), +/-LSB	1	1	1	1
Input Range(Max), V	5.5	5.5	5.5	5.5
Input Type	Single-Ended	Single-Ended	Single-Ended	Single-Ended
Integrated Features	Oscillator	Oscillator	Oscillator	Oscillator
Interface	Parallel	Parallel	Parallel	Parallel
Multi-Channel Configuration	N/A	N/A	N/A	N/A
Operating Temperature Range, C	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70	-40 to 85,0 to 70
Package Group	SOIC	SOIC	SOIC	TSSOP
Package Size: mm2:W x L, PKG	24SOIC: 160 mm2: 10.3 x 15.5(SOIC)	24SOIC: 160 mm2: 10.3 x 15.5(SOIC)	24SOIC: 160 mm2: 10.3 x 15.5(SOIC)	24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Power Consumption(Typ), mW	12	12	12	12
Rating	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext	Ext	Ext	Ext
Resolution, Bits	10	10	10	10
SINAD, dB	60	60	60	60
SNR, dB	60	60	60	60
Sample Rate (max), SPS	1.25MSPS	1.25MSPS	1.25MSPS	1.25MSPS
Sample Rate(Max), MSPS	1.25	1.25	1.25	1.25
THD(Typ), dB	-60	-60	-60	-60

Plan ecológico

Notas de aplicación

• Descargar
  Interfacing the TLV1571/78 Analog-to-Digital Converter to the TMS320C542 DSP
  PDF, 192 Kb, Archivo publicado: oct 7, 1999
  This application report presents a hardware solution for interfacing the TLV1571/TLV1578 10-bit, 1.25 MSPS low-power analog-to-digital converter (ADC) to the 16-bit fixed-point TMS320C542 digital signal processor (DSP). The report describes the interface hardware and C-callable software routines, which support communication between ADC and DSP.
• Descargar
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, Revisión: A, Archivo publicado: nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
• Descargar
  Determining Minimum Acquisition Times for SAR ADCs, part 2
  PDF, 215 Kb, Archivo publicado: marzo 17, 2011
  The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)