Datasheet Texas Instruments TLC2654 — Ficha de datos

FabricanteTexas Instruments
SerieTLC2654
Datasheet Texas Instruments TLC2654

Amplificador operacional estabilizado por chopper de bajo ruido

Hojas de datos

Advanced LinCMOS Low-Noise Chopper Stabilized Operational Amplifiers datasheet
PDF, 1.2 Mb, Revisión: G, Archivo publicado: abr 25, 2001
Extracto del documento

Precios

Estado

TLC2654C-14DTLC2654C-14DRTLC2654C-8DTLC2654C-8DG4TLC2654C-8DRTLC2654C-8DRG4TLC2654CNTLC2654CPTLC2654CPE4TLC2654I-8DTLC2654I-8DRTLC2654IPTLC2654IPE4TLC2654Q-8D
Estado del ciclo de vidaObsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNoNoNoNoNo

Embalaje

TLC2654C-14DTLC2654C-14DRTLC2654C-8DTLC2654C-8DG4TLC2654C-8DRTLC2654C-8DRG4TLC2654CNTLC2654CPTLC2654CPE4TLC2654I-8DTLC2654I-8DRTLC2654IPTLC2654IPE4TLC2654Q-8D
N1234567891011121314
Pin14148888148888888
Package TypeDDDDDDNPPDDPPD
Industry STD TermSOICSOICSOICSOICSOICSOICPDIPPDIPPDIPSOICSOICPDIPPDIPSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDIP-TR-PDIP-TR-PDSO-G
Width (mm)3.913.913.913.913.913.916.356.356.353.913.916.356.353.91
Length (mm)8.658.654.94.94.94.919.39.819.814.94.99.819.814.9
Thickness (mm)1.581.581.581.581.581.583.93.93.91.581.583.93.91.58
Pitch (mm)1.271.271.271.271.271.272.542.542.541.271.272.542.541.27
Max Height (mm)1.751.751.751.751.751.755.085.085.081.751.755.085.081.75
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar
Package QTY25007575250025002550507525005050
CarrierLARGE T&RTUBETUBELARGE T&RLARGE T&RTUBETUBETUBETUBELARGE T&RTUBETUBE
Device MarkingTLC2654C2654C2654C2654C2654CTLC2654CNTLC2654CPTLC2654CP2654I2654ITLC2654IPTLC2654IP

Paramétricos

Parameters / ModelsTLC2654C-14D
TLC2654C-14D
TLC2654C-14DR
TLC2654C-14DR
TLC2654C-8D
TLC2654C-8D
TLC2654C-8DG4
TLC2654C-8DG4
TLC2654C-8DR
TLC2654C-8DR
TLC2654C-8DRG4
TLC2654C-8DRG4
TLC2654CN
TLC2654CN
TLC2654CP
TLC2654CP
TLC2654CPE4
TLC2654CPE4
TLC2654I-8D
TLC2654I-8D
TLC2654I-8DR
TLC2654I-8DR
TLC2654IP
TLC2654IP
TLC2654IPE4
TLC2654IPE4
TLC2654Q-8D
TLC2654Q-8D
Additional FeaturesZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero DriftZero Drift
Approx. Price (US$)1.78 | 1ku1.78 | 1ku
ArchitectureCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOSCMOS
CMRR(Min), dB105105105105105105105105105105105105
CMRR(Min)(dB)105105
CMRR(Typ), dB125125125125125125125125125125125125
CMRR(Typ)(dB)125125
GBW(Typ), MHz1.91.91.91.91.91.91.91.91.91.91.91.9
GBW(Typ)(MHz)1.91.9
Input Bias Current(Max), pA606060606060606060606060
Input Bias Current(Max)(pA)6060
Iq per channel(Max), mA2.42.42.42.42.42.42.42.42.42.42.42.4
Iq per channel(Max)(mA)2.42.4
Iq per channel(Typ), mA1.51.51.51.51.51.51.51.51.51.51.51.5
Iq per channel(Typ)(mA)1.51.5
Number of Channels111111111111
Number of Channels(#)11
Offset Drift(Typ), uV/C0.010.010.010.010.010.010.010.010.010.010.010.01
Offset Drift(Typ)(uV/C)0.010.01
Operating Temperature Range, C-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70-40 to 85,0 to 70
Operating Temperature Range(C)-40 to 85
0 to 70
-40 to 85
0 to 70
Output Current(Typ), mA333333333333
Output Current(Typ)(mA)33
Package GroupSOICSOICSOICSOICSOICSOICPDIPPDIPPDIPSOICSOICPDIPPDIPSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)See datasheet (PDIP)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)See datasheet (PDIP)See datasheet (PDIP)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)See datasheet (PDIP)
Rail-to-RailIn to V-
Out
In to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-,OutIn to V-
Out
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us2.82.82.82.82.82.82.82.82.82.82.82.8
Slew Rate(Typ)(V/us)2.82.8
Total Supply Voltage(Max), +5V=5, +/-5V=10161616161616161616161616
Total Supply Voltage(Max)(+5V=5, +/-5V=10)1616
Total Supply Voltage(Min), +5V=5, +/-5V=104.64.64.64.64.64.64.64.64.64.64.64.6
Total Supply Voltage(Min)(+5V=5, +/-5V=10)4.64.6
Vn at 1kHz(Typ), nV/rtHz232323232323232323232323
Vn at 1kHz(Typ)(nV/rtHz)2323
Vos (Offset Voltage @ 25C)(Max), mV0.020.020.020.020.020.020.020.020.020.020.020.02
Vos (Offset Voltage @ 25C)(Max)(mV)0.020.02

Plan ecológico

TLC2654C-14DTLC2654C-14DRTLC2654C-8DTLC2654C-8DG4TLC2654C-8DRTLC2654C-8DRG4TLC2654CNTLC2654CPTLC2654CPE4TLC2654I-8DTLC2654I-8DRTLC2654IPTLC2654IPE4TLC2654Q-8D
RoHSDesobedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteObedienteDesobediente
Pb gratisNoNo

Notas de aplicación

  • DC Parameters: Input Offset Voltage
    PDF, 295 Kb, Archivo publicado: marzo 27, 2001
    The input offset voltage, VIO, is a common dc parameter in operational amplifier (op amp) specifications. This report aims to familiarize the engineer by discussing the basics and modern aspects of VIO by providing a definition and a detailed explaination of causes of VIO for BJT, BiFET, and CMOS devices. Discussion centers around measurement techniques, data sheet specifications, and the effect o
  • Choosing an ADC and Op Amp for Minimum Offset
    PDF, 72 Kb, Archivo publicado: oct 28, 1999
    Designing a mixed-signal circuit containing analog and digital components can be a challenge to the development engineer. Requirements such as a low single-polarity supply voltage and a high degree of precision may conflict, and make the choice of components and the best circuit design difficult. This report discusses problems that arise in using operational amplifiers (op amps) for signal conditi

Linea modelo

Clasificación del fabricante

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Precision Op Amps