Datasheet Texas Instruments TLC2578 — Ficha de datos
Fabricante | Texas Instruments |
Serie | TLC2578 |
Salida en serie, baja potencia con reloj de conversión incorporado y 8x FIFO, 8 canales
Hojas de datos
5-V Analog, 3-/5-V Digital, 14-/12-Bit, 200-KSPS, 4-/8-Channel Serial Analog-to- datasheet
PDF, 1.7 Mb, Revisión: C, Archivo publicado: mayo 29, 2003
Extracto del documento
Precios
Estado
TLC2578IDW | TLC2578IDWG4 | TLC2578IPW | TLC2578IPWG4 | TLC2578IPWR | TLC2578IPWRG4 | |
---|---|---|---|---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | Sí | Sí | Sí | No | Sí | No |
Embalaje
TLC2578IDW | TLC2578IDWG4 | TLC2578IPW | TLC2578IPWG4 | TLC2578IPWR | TLC2578IPWRG4 | |
---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 |
Pin | 24 | 24 | 24 | 24 | 24 | 24 |
Package Type | DW | DW | PW | PW | PW | PW |
Industry STD Term | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 25 | 25 | 60 | 60 | 2000 | 2000 |
Carrier | TUBE | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R |
Device Marking | TLC2578I | TLC2578I | Y2578 | Y2578 | Y2578 | Y2578 |
Width (mm) | 7.5 | 7.5 | 4.4 | 4.4 | 4.4 | 4.4 |
Length (mm) | 15.4 | 15.4 | 7.8 | 7.8 | 7.8 | 7.8 |
Thickness (mm) | 2.35 | 2.35 | 1 | 1 | 1 | 1 |
Pitch (mm) | 1.27 | 1.27 | .65 | .65 | .65 | .65 |
Max Height (mm) | 2.65 | 2.65 | 1.2 | 1.2 | 1.2 | 1.2 |
Mechanical Data | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar |
Paramétricos
Parameters / Models | TLC2578IDW | TLC2578IDWG4 | TLC2578IPW | TLC2578IPWG4 | TLC2578IPWR | TLC2578IPWRG4 |
---|---|---|---|---|---|---|
# Input Channels | 8 | 8 | 8 | 8 | 8 | 8 |
Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
Analog Voltage AVDD(Min), V | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 |
Architecture | SAR | SAR | SAR | SAR | SAR | SAR |
Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
Digital Supply(Min), V | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 |
INL(Max), +/-LSB | 1 | 1 | 1 | 1 | 1 | 1 |
Input Range(Max), V | 10 | 10 | 10 | 10 | 10 | 10 |
Input Range(Min), V | -10 | -10 | -10 | -10 | -10 | -10 |
Input Type | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended |
Integrated Features | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator | Oscillator |
Interface | SPI | SPI | SPI | SPI | SPI | SPI |
Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Package Group | SOIC | SOIC | TSSOP | TSSOP | TSSOP | TSSOP |
Package Size: mm2:W x L, PKG | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) |
Power Consumption(Typ), mW | 29 | 29 | 29 | 29 | 29 | 29 |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Reference Mode | Ext | Ext | Ext | Ext | Ext | Ext |
Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 |
SINAD, dB | 72 | 72 | 72 | 72 | 72 | 72 |
SNR, dB | 72 | 72 | 72 | 72 | 72 | 72 |
Sample Rate (max), SPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS | 200kSPS |
Sample Rate(Max), MSPS | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 | 0.2 |
THD(Typ), dB | -82 | -82 | -82 | -82 | -82 | -82 |
Plan ecológico
TLC2578IDW | TLC2578IDWG4 | TLC2578IPW | TLC2578IPWG4 | TLC2578IPWR | TLC2578IPWRG4 | |
---|---|---|---|---|---|---|
RoHS | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente |
Notas de aplicación
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: TLC2578 (6)
Clasificación del fabricante
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)