Datasheet Texas Instruments TLC2574 — Ficha de datos

FabricanteTexas Instruments
SerieTLC2574
Datasheet Texas Instruments TLC2574

Salida serie, baja potencia con reloj de conversión incorporado y 8x FIFO, 4 canales

Hojas de datos

5-V Analog, 3-/5-V Digital, 14-/12-Bit, 200-KSPS, 4-/8-Channel Serial Analog-to- datasheet
PDF, 1.7 Mb, Revisión: C, Archivo publicado: mayo 29, 2003
Extracto del documento

Precios

Estado

TLC2574IDWTLC2574IDWG4TLC2574IPWTLC2574IPWG4
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

TLC2574IDWTLC2574IDWG4TLC2574IPWTLC2574IPWG4
N1234
Pin20202020
Package TypeDWDWPWPW
Industry STD TermSOICSOICTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25257070
CarrierTUBETUBETUBETUBE
Device MarkingTLC2574ITLC2574IY2574Y2574
Width (mm)7.57.54.44.4
Length (mm)12.812.86.56.5
Thickness (mm)2.352.3511
Pitch (mm)1.271.27.65.65
Max Height (mm)2.652.651.21.2
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsTLC2574IDW
TLC2574IDW
TLC2574IDWG4
TLC2574IDWG4
TLC2574IPW
TLC2574IPW
TLC2574IPWG4
TLC2574IPWG4
# Input Channels4444
Analog Voltage AVDD(Max), V5.55.55.55.5
Analog Voltage AVDD(Min), V4.754.754.754.75
ArchitectureSARSARSARSAR
Digital Supply(Max), V5.55.55.55.5
Digital Supply(Min), V2.72.72.72.7
INL(Max), +/-LSB1111
Input Range(Max), V10101010
Input Range(Min), V-10-10-10-10
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesOscillatorOscillatorOscillatorOscillator
InterfaceSPISPISPISPI
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupSOICSOICTSSOPTSSOP
Package Size: mm2:W x L, PKG20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Power Consumption(Typ), mW29292929
RatingCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExt
Resolution, Bits12121212
SINAD, dB72727272
SNR, dB72727272
Sample Rate (max), SPS200kSPS200kSPS200kSPS200kSPS
Sample Rate(Max), MSPS0.20.20.20.2
THD(Typ), dB-82-82-82-82

Plan ecológico

TLC2574IDWTLC2574IDWG4TLC2574IPWTLC2574IPWG4
RoHSObedienteObedienteObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)