Datasheet Texas Instruments TLC2558 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | TLC2558 |
12 bits, 400 KSPS ADC, 8 canales. Serie con apagado
Hojas de datos
5-V, 12-Bit, 400 KSPS, 4/8 Channel, Low Power, Serial A-D Converter datasheet
PDF, 1.5 Mb, Revisión: A, Archivo publicado: jul 1, 1999
Extracto del documento
Precios
Estado
| TLC2558CDW | TLC2558CDWG4 | TLC2558IDW | TLC2558IDWG4 | TLC2558IPW | TLC2558IPWR | |
|---|---|---|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No | No | No | No | No | No |
Embalaje
| TLC2558CDW | TLC2558CDWG4 | TLC2558IDW | TLC2558IDWG4 | TLC2558IPW | TLC2558IPWR | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DW | DW | DW | DW | PW | PW |
| Industry STD Term | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 25 | 25 | 25 | 25 | 70 | 2000 |
| Carrier | TUBE | TUBE | TUBE | TUBE | TUBE | LARGE T&R |
| Device Marking | TLC2558C | TLC2558C | TLC2558I | TLC2558I | Y2558 | Y2558 |
| Width (mm) | 7.5 | 7.5 | 7.5 | 7.5 | 4.4 | 4.4 |
| Length (mm) | 12.8 | 12.8 | 12.8 | 12.8 | 6.5 | 6.5 |
| Thickness (mm) | 2.35 | 2.35 | 2.35 | 2.35 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 |
| Max Height (mm) | 2.65 | 2.65 | 2.65 | 2.65 | 1.2 | 1.2 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar | Descargar | Descargar |
Paramétricos
| Parameters / Models | TLC2558CDW | TLC2558CDWG4 | TLC2558IDW | TLC2558IDWG4 | TLC2558IPW | TLC2558IPWR |
|---|---|---|---|---|---|---|
| # Input Channels | 8 | 8 | 8 | 8 | 8 | 8 |
| Analog Voltage AVDD(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Analog Voltage AVDD(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
| Architecture | SAR | SAR | SAR | SAR | SAR | SAR |
| Digital Supply(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Digital Supply(Min), V | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 |
| INL(Max), +/-LSB | 1 | 1 | 1 | 1 | 1 | 1 |
| Input Range(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| Input Type | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended | Pseudo-Differential,Single-Ended |
| Integrated Features | N/A | N/A | N/A | N/A | N/A | N/A |
| Interface | SPI | SPI | SPI | SPI | SPI | SPI |
| Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | SOIC | SOIC | SOIC | SOIC | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) |
| Power Consumption(Typ), mW | 9 | 9 | 9 | 9 | 9 | 9 |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 |
| SINAD, dB | 71 | 71 | 71 | 71 | 71 | 71 |
| SNR, dB | 71 | 71 | 71 | 71 | 71 | 71 |
| Sample Rate (max), SPS | 400kSPS | 400kSPS | 400kSPS | 400kSPS | 400kSPS | 400kSPS |
| Sample Rate(Max), MSPS | 0.4 | 0.4 | 0.4 | 0.4 | 0.4 | 0.4 |
| THD(Typ), dB | -82 | -82 | -82 | -82 | -82 | -82 |
Plan ecológico
| TLC2558CDW | TLC2558CDWG4 | TLC2558IDW | TLC2558IDWG4 | TLC2558IPW | TLC2558IPWR | |
|---|---|---|---|---|---|---|
| RoHS | Obediente | Obediente | Obediente | Obediente | Obediente | Obediente |
Notas de aplicación
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, Archivo publicado: marzo 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Linea modelo
Serie: TLC2558 (6)
Clasificación del fabricante
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)