Datasheet Texas Instruments TLC2543-EP — Ficha de datos

FabricanteTexas Instruments
SerieTLC2543-EP
Datasheet Texas Instruments TLC2543-EP

Producto mejorado Convertidor analógico a digital de 12 bits con control en serie y 11 entradas analógicas

Hojas de datos

TLC2543-EP datasheet
PDF, 1.1 Mb, Revisión: A, Archivo publicado: nov 2, 2006
Extracto del documento

Precios

Estado

TLC2543MDBREPTLC2543QDWREPV62/03614-01XEV62/03614-02YE
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNo

Embalaje

TLC2543MDBREPTLC2543QDWREPV62/03614-01XEV62/03614-02YE
N1234
Pin20202020
Package TypeDBDWDWDB
Industry STD TermSSOPSOICSOICSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2000200020002000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingTLC2543EPTLC2543QEPTLC2543QEPTLC2543EP
Width (mm)5.37.57.55.3
Length (mm)7.212.812.87.2
Thickness (mm)1.952.352.351.95
Pitch (mm).651.271.27.65
Max Height (mm)22.652.652
Mechanical DataDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsTLC2543MDBREP
TLC2543MDBREP
TLC2543QDWREP
TLC2543QDWREP
V62/03614-01XE
V62/03614-01XE
V62/03614-02YE
V62/03614-02YE
# Input Channels11111111
Analog Voltage AVDD(Max), V5.55.55.55.5
Analog Voltage AVDD(Min), V4.54.54.54.5
ArchitectureSARSARSARSAR
Digital Supply(Max), V5.55.55.55.5
Digital Supply(Min), V4.54.54.54.5
INL(Max), +/-LSB1111
InterfaceSPISPISPISPI
Operating Temperature Range, C-40 to 125,-55 to 125-40 to 125,-55 to 125-40 to 125,-55 to 125-40 to 125,-55 to 125
Package GroupSSOPSOICSOICSSOP
Package Size: mm2:W x L, PKG20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)
Power Consumption(Typ), mW5555
RatingHiRel Enhanced ProductHiRel Enhanced ProductHiRel Enhanced ProductHiRel Enhanced Product
Reference ModeExtExtExtExt
Resolution, Bits12121212
Sample Rate (max), SPS66kSPS66kSPS66kSPS66kSPS

Plan ecológico

TLC2543MDBREPTLC2543QDWREPV62/03614-01XEV62/03614-02YE
RoHSObedienteObedienteObedienteObediente

Notas de aplicación

  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, Archivo publicado: marzo 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Linea modelo

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters