Datasheet Texas Instruments TCI6638K2K — Ficha de datos

Fabricante	Texas Instruments
Serie	TCI6638K2K

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Plan ecológico

Notas de aplicación

• Descargar
  Ethernet Packet Transfer Via FastC&M over AIF2 Application Report
  PDF, 168 Kb, Archivo publicado: dic 6, 2013
• Descargar
  KeyStone I-to-KeyStone II Migration Guide (Rev. A)
  PDF, 479 Kb, Revisión: A, Archivo publicado: jul 30, 2015
  This guide describes the main System-on-Chip (SoC) level and peripheral changes that need to be considered when migrating a KeyStone I-based system design to a KeyStone II-based system design.In this guide, KeyStone I includes all TMS320TCI661x devices and KeyStone II includes all TCI663xK2y devices. Any differences within KeyStone I or KeyStone II devices are described explicitly.
• Descargar
  Keystone II DDR3 Initialization
  PDF, 73 Kb, Archivo publicado: enero 26, 2015
  This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
• Descargar
  Throughput Performance Guide for KeyStone II Devices (Rev. B)
  PDF, 866 Kb, Revisión: B, Archivo publicado: dic 22, 2015
  This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
• Descargar
  Keystone II DDR3 Debug Guide
  PDF, 143 Kb, Archivo publicado: oct 16, 2015
  This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
• Descargar
  Power Management of KS2 Device (Rev. C)
  PDF, 61 Kb, Revisión: C, Archivo publicado: jul 15, 2016
  This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
• Descargar
  Hardware Design Guide for KeyStone II Devices
  PDF, 1.8 Mb, Archivo publicado: marzo 24, 2014
• Descargar
  SERDES Link Commissioning on KeyStone I and II Devices
  PDF, 138 Kb, Archivo publicado: abr 13, 2016
  The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
• Descargar
  PCIe Use Cases for KeyStone Devices
  PDF, 320 Kb, Archivo publicado: dic 13, 2011
• Descargar
  Clocking Design Guide for KeyStone Devices
  PDF, 1.5 Mb, Archivo publicado: nov 9, 2010
• Descargar
  Optimizing Loops on the C66x DSP
  PDF, 585 Kb, Archivo publicado: nov 9, 2010
• Descargar
  The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
  PDF, 20 Kb, Revisión: A, Archivo publicado: nov 10, 2010
  The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
• Descargar
  DDR3 Design Requirements for KeyStone Devices (Rev. B)
  PDF, 582 Kb, Revisión: B, Archivo publicado: jun 5, 2014
• Descargar
  Multicore Programming Guide (Rev. B)
  PDF, 1.8 Mb, Revisión: B, Archivo publicado: agosto 29, 2012
  As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore
• Descargar
  Thermal Design Guide for DSP and ARM Application Processors (Rev. A)
  PDF, 324 Kb, Revisión: A, Archivo publicado: agosto 17, 2016
  This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require

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• Semiconductors> Processors> Other Processors