Datasheet Texas Instruments SN75LVDS82DGGR — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN75LVDS82 |
Numero de parte | SN75LVDS82DGGR |
Receptor FlatLink ™ 56-TSSOP 0 a 70
Hojas de datos
SN75LVDS82 FlatLinkв„ў Receiver datasheet
PDF, 1.5 Mb, Revisión: J, Archivo publicado: oct 24, 2016
Extracto del documento
Precios
Estado
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | Sí |
Embalaje
Pin | 56 |
Package Type | DGG |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | SN75LVDS82 |
Width (mm) | 6.1 |
Length (mm) | 14 |
Thickness (mm) | 1.15 |
Pitch (mm) | .5 |
Max Height (mm) | 1.2 |
Mechanical Data | Descargar |
Paramétricos
Operating Temperature Range | 0 to 70 C |
Package Group | TSSOP |
Package Size: mm2:W x L | 56TSSOP: 113 mm2: 8.1 x 14(TSSOP) PKG |
Protocols | Channel-Link I |
Rating | Catalog |
Supply Voltage(s) | 3.3 V |
Plan ecológico
RoHS | Obediente |
Notas de aplicación
- FlatLinkв„ў Data Transmission System Using SN75LVDS83B/SN75LVDS82/SN75LVDS86APDF, 333 Kb, Archivo publicado: feb 2, 2010
This application report presents various system designs possible using the FlatLinkв„ў transmitter:SN75LVDS83B, and the FlatLinkв„ў receivers: SN75LVDS82 and SN75LVDS86A. These are low-voltagedifferential signaling (LVDS) serializer/deserializer (SerDes) devices commonly used to transmit video datato liquid crystal display (LCD) panels. The application report starts with an introduction of the F - Time Budgeting of the Flatlink Interface Application ReportPDF, 99 Kb, Archivo publicado: jun 11, 1997
This document describes the FlatLinkE point-to-point data-transmission interface that provides better than a two-to-one reduction in the number of signal lines used for synchronous parallel data-bus structures. - Flatlink Data Transmission System Design Overview (Rev. A)PDF, 127 Kb, Revisión: A, Archivo publicado: jun 1, 2001
FlatLink is a data transmission system that can provide better than a 2:1 reduction in the number of signal lines used for synchronous parallel data bus structures with no loss in data throughput. To do this, FlatLink takes single-ended data at clock rates of up to 68 MHz and increases the data signaling rate seven times up to 476 Mbps. The following report provides some design guidelinesfo
Linea modelo
Serie: SN75LVDS82 (4)
- SN75LVDS82DGG SN75LVDS82DGGG4 SN75LVDS82DGGR SN75LVDS82DGGRG4
Clasificación del fabricante
- Semiconductors > Interface > LVDS/M-LVDS/PECL > SerDes/Channel-Link