Datasheet Texas Instruments SN74S32 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74S32 |
Puertas cuádruples positivas de 2 entradas
Hojas de datos
Quadruple 2-Input Positive-OR Gates datasheet
PDF, 1.3 Mb, Archivo publicado: marzo 1, 1988
Extracto del documento
Precios
Estado
| SN74S32D | SN74S32DR | SN74S32N | SN74S32N3 | |
|---|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No | No | No | No |
Embalaje
| SN74S32D | SN74S32DR | SN74S32N | SN74S32N3 | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 14 | 14 | 14 | 14 |
| Package Type | D | D | N | N |
| Industry STD Term | SOIC | SOIC | PDIP | PDIP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDIP-T | R-PDIP-T |
| Package QTY | 50 | 2500 | 25 | |
| Carrier | TUBE | LARGE T&R | TUBE | |
| Device Marking | S32 | S32 | SN74S32N | |
| Width (mm) | 3.91 | 3.91 | 6.35 | 6.35 |
| Length (mm) | 8.65 | 8.65 | 19.3 | 19.3 |
| Thickness (mm) | 1.58 | 1.58 | 3.9 | 3.9 |
| Pitch (mm) | 1.27 | 1.27 | 2.54 | 2.54 |
| Max Height (mm) | 1.75 | 1.75 | 5.08 | 5.08 |
| Mechanical Data | Descargar | Descargar | Descargar | Descargar |
Paramétricos
| Parameters / Models | SN74S32D | SN74S32DR | SN74S32N | SN74S32N3 |
|---|---|---|---|---|
| Approx. Price (US$) | 0.37 | 1ku | |||
| Bits | 4 | 4 | 4 | |
| Bits(#) | 4 | |||
| F @ Nom Voltage(Max), Mhz | 50 | 50 | 50 | |
| F @ Nom Voltage(Max)(Mhz) | 50 | |||
| ICC @ Nom Voltage(Max), mA | 0.038 | 0.038 | 0.038 | |
| ICC @ Nom Voltage(Max)(mA) | 0.038 | |||
| Input Type | TTL | |||
| Operating Temperature Range, C | 0 to 70 | 0 to 70 | 0 to 70 | |
| Operating Temperature Range(C) | 0 to 70 | |||
| Output Drive (IOL/IOH)(Max), mA | 0.8/-16 | 0.8/-16 | 0.8/-16 | |
| Output Drive (IOL/IOH)(Max)(mA) | 0.8/-16 | |||
| Output Type | TTL | |||
| Package Group | SOIC | SOIC | PDIP | PDIP |
| Package Size: mm2:W x L, PKG | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | See datasheet (PDIP) | |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) | |||
| Rating | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No |
| Technology Family | S | S | S | S |
| VCC(Max), V | 5.25 | 5.25 | 5.25 | |
| VCC(Max)(V) | 5.25 | |||
| VCC(Min), V | 4.75 | 4.75 | 4.75 | |
| VCC(Min)(V) | 4.75 | |||
| Voltage(Nom), V | 5 | 5 | 5 | |
| Voltage(Nom)(V) | 5 | |||
| tpd @ Nom Voltage(Max), ns | 22 | 22 | 22 | |
| tpd @ Nom Voltage(Max)(ns) | 22 |
Plan ecológico
Linea modelo
Clasificación del fabricante
- Semiconductors> Logic> Gate> OR Gate