Datasheet Texas Instruments SN74LVTH574-EP — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVTH574-EP
Datasheet Texas Instruments SN74LVTH574-EP

Producto mejorado 3.3-V Abt Octal Flip-Flops tipo D disparado por borde con salidas de 3 estados

Hojas de datos

SN74LVTH574-EP datasheet
PDF, 653 Kb, Archivo publicado: nov 7, 2003
Extracto del documento

Precios

Estado

SN74LVTH574IPWREPV62/04679-01XE
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNo

Embalaje

SN74LVTH574IPWREPV62/04679-01XE
N12
Pin2020
Package TypePWPW
Industry STD TermTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY20002000
CarrierLARGE T&RLARGE T&R
Device MarkingLH574EPLH574EP
Width (mm)4.44.4
Length (mm)6.56.5
Thickness (mm)11
Pitch (mm).65.65
Max Height (mm)1.21.2
Mechanical DataDescargarDescargar

Paramétricos

Parameters / ModelsSN74LVTH574IPWREP
SN74LVTH574IPWREP
V62/04679-01XE
V62/04679-01XE
3-State OutputYesYes
Bits88
F @ Nom Voltage(Max), Mhz160160
ICC @ Nom Voltage(Max), mA55
Input TypeTTLTTL
Operating Temperature Range, C-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA64/-3264/-32
Output TypeTTLTTL
Package GroupTSSOPTSSOP
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
RatingHiRel Enhanced ProductHiRel Enhanced Product
Technology FamilyLVTLVT
VCC(Max), V3.63.6
VCC(Min), V2.72.7
tpd @ Nom Voltage(Max), ns4.54.5

Plan ecológico

SN74LVTH574IPWREPV62/04679-01XE
RoHSObedienteObediente

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Linea modelo

Serie: SN74LVTH574-EP (2)

Clasificación del fabricante

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers