Datasheet Texas Instruments SN74LVTH273-EP — Ficha de datos

Fabricante	Texas Instruments
Serie	SN74LVTH273-EP

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	CLVTH273MNSREPG4	SN74LVTH273MNSREP	V62/04674-02YE
3-State Output	No	No	No
Bits	8	8	8
F @ Nom Voltage(Max), Mhz	160	160	160
ICC @ Nom Voltage(Max), mA	5	5	5
Input Type	TTL	TTL	TTL
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	64/-32	64/-32	64/-32
Output Type	TTL	TTL	TTL
Package Group	SO	SO	SO
Package Size: mm2:W x L, PKG	20SO: 98 mm2: 7.8 x 12.6(SO)	20SO: 98 mm2: 7.8 x 12.6(SO)	20SO: 98 mm2: 7.8 x 12.6(SO)
Rating	HiRel Enhanced Product	HiRel Enhanced Product	HiRel Enhanced Product
Technology Family	LVT	LVT	LVT
VCC(Max), V	3.6	3.6	3.6
VCC(Min), V	2.7	2.7	2.7
tpd @ Nom Voltage(Max), ns	4.9	4.9	4.9

Plan ecológico

Notas de aplicación

• Descargar
  LVT Family Characteristics (Rev. A)
  PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
  To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
• Descargar
  LVT-to-LVTH Conversion
  PDF, 84 Kb, Archivo publicado: dic 8, 1998
  Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
• Descargar
  16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
  PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
  TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
• Descargar
  Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
  PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
  The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
• Descargar
  Understanding Advanced Bus-Interface Products Design Guide
  PDF, 253 Kb, Archivo publicado: mayo 1, 1996
• Descargar
  Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
  PDF, 209 Kb, Archivo publicado: mayo 10, 2002
  Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
• Descargar
  Power-Up Behavior of Clocked Devices (Rev. A)
  PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015

Linea modelo

Clasificación del fabricante

• Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers