Datasheet Texas Instruments V62/04730-01XE — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74LVTH182512-EP |
| Numero de parte | V62/04730-01XE |
Producto mejorado Dispositivos de prueba de escaneo Abt de 3.3 V con transceptores de bus universal de 18 bits 64-TSSOP -40 a 85
Hojas de datos
SN74LVTH18512-EP, SN74LVTH182512-EP datasheet
PDF, 678 Kb, Archivo publicado: nov 10, 2003
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 64 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | LH182512EP |
| Width (mm) | 6.1 |
| Length (mm) | 17 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Descargar |
Paramétricos
| Bits | 18 |
| ICC @ Nom Voltage(Max) | 24 mA |
| Input Type | TTL |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | 64/-32 mA |
| Output Type | TTL |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 64TSSOP: 138 mm2: 8.1 x 17(TSSOP) PKG |
| Rating | HiRel Enhanced Product |
| Technology Family | LVT |
| VCC(Max) | 3.6 V |
| VCC(Min) | 2.7 V |
| tpd @ Nom Voltage(Max) | 5.7 ns |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- LVT Family Characteristics (Rev. A)PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
Linea modelo
Serie: SN74LVTH182512-EP (2)
- 8V182512IDGGREP V62/04730-01XE
Clasificación del fabricante
- Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)
Otros nombres:
V62/0473001XE, V62/04730 01XE