Datasheet Texas Instruments V62/04712-02ZA — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVTH16373-EP
Numero de parteV62/04712-02ZA
Datasheet Texas Instruments V62/04712-02ZA

Producto mejorado Cierres tipo D transparentes Abt de 3,3 V de 16 bits con salidas de 3 estados MICROSTAR JUNIOR 56-BGA -55 a 125

Hojas de datos

SN74LVTH16373-EP 3.3-V ABT 16-Bit Transparent D-Type Latch With Tri-State Outputs datasheet
PDF, 945 Kb, Revisión: B, Archivo publicado: jun 29, 2016
Extracto del documento

Precios

Estado

Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante

Embalaje

Pin56
Package TypeGQL
Industry STD TermBGA MICROSTAR JUNIOR
JEDEC CodeR-PBGA-N
Package QTY2000
CarrierLARGE T&R
Device MarkingH16373MEP
Width (mm)4.5
Length (mm)7
Thickness (mm).75
Pitch (mm).65
Max Height (mm)1
Mechanical DataDescargar

Paramétricos

3-State OutputYes
Bits16
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)5 mA
Input TypeTTL
Operating Temperature Range-40 to 85,-55 to 125 C
Output Drive (IOL/IOH)(Max)64/-32 mA
Output TypeTTL
Package GroupBGA MICROSTAR JUNIOR
Package Size: mm2:W x L56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR) PKG
RatingHiRel Enhanced Product
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
tpd @ Nom Voltage(Max)3.8 ns

Plan ecológico

RoHSSee ti.com

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Linea modelo

Clasificación del fabricante

  • Semiconductors > Space & High Reliability > Logic Products > Flip-Flop/Latch/Registers

Otros nombres:

V62/0471202ZA, V62/04712 02ZA