Datasheet Texas Instruments SN74LVT8980AIDWREP — Ficha de datos

Producto mejorado Controladores de bus de prueba integrados Ieee Std 1149.1 (Jtag) Tap Masters 24-SOIC -40 a 85

Hojas de datos

PDF, 830 Kb, Revisión: A, Archivo publicado: oct 29, 2003

Extracto del documento

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	No

Bits	8
ICC @ Nom Voltage(Max)	7 mA
Input Type	TTL/CMOS
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	64/-32 mA
Output Type	LVTTL
Package Group	SOIC
Package Size: mm2:W x L	24SOIC: 160 mm2: 10.3 x 15.5(SOIC) PKG
Rating	HiRel Enhanced Product
Technology Family	LVT
VCC(Max)	3.6 V
VCC(Min)	2.7 V
tpd @ Nom Voltage(Max)	30 ns

RoHS

Obediente

Descargar
LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
Descargar
LVT-to-LVTH Conversion
PDF, 84 Kb, Archivo publicado: dic 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

Serie: SN74LVT8980A-EP (2)

Semiconductors > Space & High Reliability > Logic Products > Specialty Logic Products > Boundary Scan (JTAG)