Datasheet Texas Instruments SN74LVT16244B — Ficha de datos

FabricanteTexas Instruments
SerieSN74LVT16244B
Datasheet Texas Instruments SN74LVT16244B

Búferes / controladores ABT de 16 bits y 3.3 V con salidas de 3 estados

Hojas de datos

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS--SN74LVT16244B datasheet
PDF, 940 Kb, Revisión: E, Archivo publicado: dic 1, 2006
Extracto del documento

Precios

Estado

74LVT16244BDGGRG4SN74LVT16244BDGGRSN74LVT16244BDGVRSN74LVT16244BDLSN74LVT16244BDLG4SN74LVT16244BDLRSN74LVT16244BGQLRSN74LVT16244BZQLRSN74LVT16244BZRDR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNoNoNo

Embalaje

74LVT16244BDGGRG4SN74LVT16244BDGGRSN74LVT16244BDGVRSN74LVT16244BDLSN74LVT16244BDLG4SN74LVT16244BDLRSN74LVT16244BGQLRSN74LVT16244BZQLRSN74LVT16244BZRDR
N123456789
Pin484848484848565654
Package TypeDGGDGGDGVDLDLDLGQLZQLZRD
Industry STD TermTSSOPTSSOPTVSOPSSOPSSOPSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-NR-PBGA-NR-PBGA-N
Package QTY2000200020002525100010001000
CarrierLARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingLVT16244BLVT16244BVD244BLVT16244BLVT16244BLVT16244BVD244BVD244B
Width (mm)6.16.14.47.497.497.494.54.55.5
Length (mm)12.512.59.715.8815.8815.88778
Thickness (mm)1.151.151.052.592.592.59.75.75.8
Pitch (mm).5.5.4.635.635.635.65.65.8
Max Height (mm)1.21.21.22.792.792.79111.2
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / Models74LVT16244BDGGRG4
74LVT16244BDGGRG4
SN74LVT16244BDGGR
SN74LVT16244BDGGR
SN74LVT16244BDGVR
SN74LVT16244BDGVR
SN74LVT16244BDL
SN74LVT16244BDL
SN74LVT16244BDLG4
SN74LVT16244BDLG4
SN74LVT16244BDLR
SN74LVT16244BDLR
SN74LVT16244BGQLR
SN74LVT16244BGQLR
SN74LVT16244BZQLR
SN74LVT16244BZQLR
SN74LVT16244BZRDR
SN74LVT16244BZRDR
Approx. Price (US$)0.71 | 1ku
Bits1616161616161616
Bits(#)16
F @ Nom Voltage(Max), Mhz160160160160160160160160
F @ Nom Voltage(Max)(Mhz)160
ICC @ Nom Voltage(Max), mA0.0050.0050.0050.0050.0050.0050.0050.005
ICC @ Nom Voltage(Max)(mA)0.005
Input TypeTTL/CMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64-32/64-32/64-32/64-32/64-32/64-32/64
Output Drive (IOL/IOH)(Max)(mA)-32/64
Output TypeLVTTL
Package GroupTSSOPTSSOPTVSOPSSOPSSOPSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNo
Technology FamilyLVTLVTLVTLVTLVTLVTLVTLVTLVT
VCC(Max), V3.63.63.63.63.63.63.63.6
VCC(Max)(V)3.6
VCC(Min), V2.72.72.72.72.72.72.72.7
VCC(Min)(V)2.7
Voltage(Nom), V3.33.33.33.33.33.33.33.3
Voltage(Nom)(V)3.3
tpd @ Nom Voltage(Max), ns3.73.73.73.73.73.73.73.7
tpd @ Nom Voltage(Max)(ns)3.7

Plan ecológico

74LVT16244BDGGRG4SN74LVT16244BDGGRSN74LVT16244BDGVRSN74LVT16244BDLSN74LVT16244BDLG4SN74LVT16244BDLRSN74LVT16244BGQLRSN74LVT16244BZQLRSN74LVT16244BZRDR
RoHSObedienteObedienteObedienteObedienteObedienteObedienteDesobedienteObedienteObediente
Pb gratisNo

Notas de aplicación

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revisión: A, Archivo publicado: marzo 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, Archivo publicado: dic 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, Archivo publicado: mayo 1, 1996
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, Archivo publicado: mayo 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Live Insertion
    PDF, 150 Kb, Archivo publicado: oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, Archivo publicado: oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver