Datasheet Texas Instruments 74GTLPH306DGVRE4 — Ficha de datos

Fabricante	Texas Instruments
Serie	SN74GTLPH306
Numero de parte	74GTLPH306DGVRE4

Transceptor de bus LVTTL a GTLP de 8 bits 24-TVSOP -40 a 85

Hojas de datos

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PDF, 583 Kb, Revisión: E, Archivo publicado: agosto 14, 2001

Extracto del documento

Precios

Estado

Estado del ciclo de vida	Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricante	Sí

Embalaje

Pin	24
Package Type	DGV
Industry STD Term	TVSOP
JEDEC Code	R-PDSO-G
Package QTY	2000
Carrier	LARGE T&R
Device Marking	GH306
Width (mm)	4.4
Length (mm)	5
Thickness (mm)	1.05
Pitch (mm)	.4
Max Height (mm)	1.2
Mechanical Data	Descargar

Paramétricos

Bits	8
F @ Nom Voltage(Max)	175 Mhz
ICC @ Nom Voltage(Max)	20 mA
Operating Temperature Range	-40 to 85 C
Output Drive (IOL/IOH)(Max)	50 mA
Package Group	TVSOP
Package Size: mm2:W x L	24TVSOP: 32 mm2: 6.4 x 5(TVSOP) PKG
Rating	Catalog
Schmitt Trigger	No
Technology Family	GTLP
VCC(Max)	3.45 V
VCC(Min)	3.15 V
Voltage(Nom)	3.3 V
tpd @ Nom Voltage(Max)	7.5 ns

Plan ecológico

RoHS

Obediente

Notas de aplicación

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Texas Instruments GTLP Frequently Asked Questions
PDF, 496 Kb, Archivo publicado: enero 1, 2001
Using a question-and-answer format, advantages of TI?s GTLP devices, particularly for backplane applications, are presented, as well as differences between GTLP and GTL/LVDS devices. Applicable topics include data throughput rates, synchronous clocks, price and alternative sources, bus transceivers, live insertion, power consumption, backplane termination, voltage translation, IBIS and HSPICE mode
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Logic in Live-Insertion Applications With a Focus on GTLP
PDF, 493 Kb, Archivo publicado: enero 14, 2002
Live-insertion capability is an essential part of today?s high-speed data systems because those systems are expected to run continuously without being powered down. This application report delves into the cause and prevention of live-insertion and nanosecond-discontinuity effects, using both simulation and actual test measurements from a specially built GTLP EVM. Hypothetical cases for precharge c
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Achieving Maximum Speed on Parallel Buses With Gunning Transceiver Logic (GTLP)
PDF, 585 Kb, Archivo publicado: abr 5, 2001
This application report compares two approaches for synchronous bus-system designs. The focus of the report is the comparison of a system using central-synchronous system clock (CSSC) with a system operated with a source-synchronous system clock (SSSC).The basic characteristics of lines, key factors that influence the bus line delay, and the impedance of bus lines are described.The theoretical
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Fast GTLP Backplanes With the GTLPH1655 (Rev. A)
PDF, 1.1 Mb, Revisión: A, Archivo publicado: sept 19, 2000
This revision of the Fast GTL Backplanes With the GTL1655 application report addresses improvements, such as the improved OECE circuitry and implementation of theTexas Instruments TI-OPCE circuitry, that have been incorporated in the GTLPH1655 device. These improvements significantly improve signal integrity in distributed loads.This application report describes the physical principles of fast
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Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
PDF, 209 Kb, Archivo publicado: mayo 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Linea modelo

Serie: SN74GTLPH306 (6)

74GTLPH306DGVRE4 SN74GTLPH306DGVR SN74GTLPH306DW SN74GTLPH306DWR SN74GTLPH306PW SN74GTLPH306PWR

Clasificación del fabricante

Semiconductors > Logic > Backplane Logic (GTL/TTL/BTL/ECL Transceiver/Translator)