Datasheet Texas Instruments SN74AUC2G125 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74AUC2G125 |
Puerta de búfer de bus dual con salidas de 3 estados
Hojas de datos
Dual Bus Buffer Gate With 3-State Outputs--SN74AUC2G125 datasheet
PDF, 958 Kb, Revisión: D, Archivo publicado: agosto 8, 2007
Extracto del documento
Precios
Estado
| SN74AUC2G125DCTR | SN74AUC2G125DCUR | SN74AUC2G125YZPR | |
|---|---|---|---|
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | Sí | Sí | Sí |
Embalaje
| SN74AUC2G125DCTR | SN74AUC2G125DCUR | SN74AUC2G125YZPR | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 8 | 8 | 8 |
| Package Type | DCT | DCU | YZP |
| Industry STD Term | SSOP | VSSOP | DSBGA |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-XBGA-N |
| Package QTY | 3000 | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | R | U25R | UMN |
| Width (mm) | 2.8 | 2 | 2.25 |
| Length (mm) | 2.95 | 2.3 | 1.25 |
| Thickness (mm) | 1.29 | .85 | .31 |
| Pitch (mm) | .65 | .5 | .5 |
| Max Height (mm) | 1.3 | .9 | .5 |
| Mechanical Data | Descargar | Descargar | Descargar |
Plan ecológico
| SN74AUC2G125DCTR | SN74AUC2G125DCUR | SN74AUC2G125YZPR | |
|---|---|---|---|
| RoHS | Obediente | Obediente | Obediente |
Notas de aplicación
- Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus DevicesPDF, 374 Kb, Archivo publicado: marzo 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V
Linea modelo
Serie: SN74AUC2G125 (3)
Clasificación del fabricante
- Semiconductors> Logic> Little Logic