Datasheet Texas Instruments SN74AS109A — Ficha de datos
Fabricante | Texas Instruments |
Serie | SN74AS109A |
Chanclas de doble JK de borde positivo disparadas con claro y preestablecido
Hojas de datos
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset datasheet
PDF, 1.0 Mb, Revisión: B, Archivo publicado: agosto 1, 1995
Extracto del documento
Precios
Estado
SN74AS109AD | SN74AS109AN | SN74AS109ANSR | |
---|---|---|---|
Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) | Activo (Recomendado para nuevos diseños) |
Disponibilidad de muestra del fabricante | No | No | No |
Embalaje
SN74AS109AD | SN74AS109AN | SN74AS109ANSR | |
---|---|---|---|
N | 1 | 2 | 3 |
Pin | 16 | 16 | 16 |
Package Type | D | N | NS |
Industry STD Term | SOIC | PDIP | SOP |
JEDEC Code | R-PDSO-G | R-PDIP-T | R-PDSO-G |
Package QTY | 40 | 25 | 2000 |
Carrier | TUBE | TUBE | LARGE T&R |
Device Marking | AS109A | SN74AS109AN | 74AS109A |
Width (mm) | 3.91 | 6.35 | 5.3 |
Length (mm) | 9.9 | 19.3 | 10.3 |
Thickness (mm) | 1.58 | 3.9 | 1.95 |
Pitch (mm) | 1.27 | 2.54 | 1.27 |
Max Height (mm) | 1.75 | 5.08 | 2 |
Mechanical Data | Descargar | Descargar | Descargar |
Paramétricos
Parameters / Models | SN74AS109AD | SN74AS109AN | SN74AS109ANSR |
---|---|---|---|
Bits | 2 | 2 | 2 |
F @ Nom Voltage(Max), Mhz | 35 | 35 | 35 |
ICC @ Nom Voltage(Max), mA | 17 | 17 | 17 |
Output Drive (IOL/IOH)(Max), mA | -0.4/8 | -0.4/8 | -0.4/8 |
Package Group | SOIC | PDIP | SO |
Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | See datasheet (PDIP) | 16SO: 80 mm2: 7.8 x 10.2(SO) |
Rating | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No |
Technology Family | AS | AS | AS |
VCC(Max), V | 5.5 | 5.5 | 5.5 |
VCC(Min), V | 4.5 | 4.5 | 4.5 |
Voltage(Nom), V | 5 | 5 | 5 |
tpd @ Nom Voltage(Max), ns | 10.5 | 10.5 | 10.5 |
Plan ecológico
SN74AS109AD | SN74AS109AN | SN74AS109ANSR | |
---|---|---|---|
RoHS | Obediente | Obediente | Obediente |
Pb gratis | Sí |
Notas de aplicación
- Advanced Schottky Load ManagementPDF, 277 Kb, Archivo publicado: feb 1, 1997
Designers of high-speed systems that include advanced Schottky (AS) devices must consider the operating environment in their work. They must be aware of the individual device characteristics and their interaction with other devices. This document provides a detailed discussion of the waveform characteristics equivalent circuit models transmission line fanout and termination for AS load manageme - Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
Linea modelo
Serie: SN74AS109A (3)
Clasificación del fabricante
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop