Datasheet Texas Instruments 74ALVCH162373GRE4 — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74ALVCH162373 |
| Numero de parte | 74ALVCH162373GRE4 |
Cierre de tipo D transparente de 16 bits con salidas de 3 estados 48-TSSOP -40 a 85
Hojas de datos
SN74ALVCH162373 datasheet
PDF, 839 Kb, Revisión: A, Archivo publicado: oct 20, 2004
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 48 |
| Package Type | DGG |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | ALVCH162373 |
| Width (mm) | 6.1 |
| Length (mm) | 12.5 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Descargar |
Paramétricos
| 3-State Output | Yes |
| Bits | 16 |
| F @ Nom Voltage(Max) | 150 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | 12/-12 mA |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ALVC |
| VCC(Max) | 3.6 V |
| VCC(Min) | 1.65 V |
| Voltage(Nom) | 1.8,2.5,2.7,3.3 V |
| tpd @ Nom Voltage(Max) | 6.3,5.3,4.5,4 ns |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Kb, Revisión: A, Archivo publicado: mayo 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Kb, Archivo publicado: agosto 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Bus-Hold CircuitPDF, 418 Kb, Archivo publicado: feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revisión: B, Archivo publicado: mayo 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa - Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)PDF, 105 Kb, Revisión: A, Archivo publicado: agosto 1, 1997
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi - Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)PDF, 154 Kb, Revisión: A, Archivo publicado: sept 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families - Understanding Advanced Bus-Interface Products Design GuidePDF, 253 Kb, Archivo publicado: mayo 1, 1996
- Migration From 3.3-V To 2.5-V Power Supplies For Logic DevicesPDF, 115 Kb, Archivo publicado: dic 1, 1997
This application report explores the possibilities for migrating to 3.3-V and 2.5-V power supplies and discusses the implications.Customers are successfully using a wide range of low-voltage 3.3-V logic devices. These devices are within Texas Instruments (TI) advanced low-voltage CMOS (ALVC) crossbar technology (CBT) crossbar technology with integrated diode (CBTD) low-voltage crossbar techn - TI IBIS File Creation Validation and Distribution ProcessesPDF, 380 Kb, Archivo publicado: agosto 29, 2002
The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con - Live InsertionPDF, 150 Kb, Archivo publicado: oct 1, 1996
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha - CMOS Power Consumption and CPD Calculation (Rev. B)PDF, 89 Kb, Revisión: B, Archivo publicado: jun 1, 1997
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale - Input and Output Characteristics of Digital Integrated CircuitsPDF, 1.7 Mb, Archivo publicado: oct 1, 1996
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revisión: A, Archivo publicado: feb 6, 2015
Linea modelo
Serie: SN74ALVCH162373 (7)
Clasificación del fabricante
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Latch