Datasheet Texas Instruments SN74ALS74A — Ficha de datos

FabricanteTexas Instruments
SerieSN74ALS74A
Datasheet Texas Instruments SN74ALS74A

Chanclas duales de tipo D activadas por borde positivo con claro y preestablecido

Hojas de datos

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset datasheet
PDF, 933 Kb, Revisión: C, Archivo publicado: agosto 1, 1995
Extracto del documento

Precios

Estado

SN74ALS74ADSN74ALS74ADRSN74ALS74ADRE4SN74ALS74AJSN74ALS74ANSN74ALS74AN3SN74ALS74ANSR
Estado del ciclo de vidaActivo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)Obsoleto (El fabricante ha interrumpido la producción del dispositivo)Activo (Recomendado para nuevos diseños)
Disponibilidad de muestra del fabricanteNoNoNoNoNoNo

Embalaje

SN74ALS74ADSN74ALS74ADRSN74ALS74ADRE4SN74ALS74AJSN74ALS74ANSN74ALS74AN3SN74ALS74ANSR
N1234567
Pin14141414141414
Package TypeDDDJNNNS
Industry STD TermSOICSOICSOICCDIPPDIPPDIPSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-GDIP-TR-PDIP-TR-PDIP-TR-PDSO-G
Package QTY5025002500252000
CarrierTUBELARGE T&RLARGE T&RTUBELARGE T&R
Device MarkingALS74AALS74AALS74ASN74ALS74ANALS74A
Width (mm)3.913.913.916.676.356.355.3
Length (mm)8.658.658.6519.5619.319.310.3
Thickness (mm)1.581.581.584.573.93.91.95
Pitch (mm)1.271.271.272.542.542.541.27
Max Height (mm)1.751.751.755.085.085.082
Mechanical DataDescargarDescargarDescargarDescargarDescargarDescargarDescargar

Paramétricos

Parameters / ModelsSN74ALS74AD
SN74ALS74AD
SN74ALS74ADR
SN74ALS74ADR
SN74ALS74ADRE4
SN74ALS74ADRE4
SN74ALS74AJ
SN74ALS74AJ
SN74ALS74AN
SN74ALS74AN
SN74ALS74AN3
SN74ALS74AN3
SN74ALS74ANSR
SN74ALS74ANSR
3-State OutputNoNoNoNoNoNoNo
Approx. Price (US$)0.28 | 1ku0.28 | 1ku
Bits22222
Bits(#)22
F @ Nom Voltage(Max), Mhz7070707070
F @ Nom Voltage(Max)(Mhz)7070
ICC @ Nom Voltage(Max), mA44444
ICC @ Nom Voltage(Max)(mA)44
Input TypeTTLTTL
Operating Temperature Range, C0 to 700 to 700 to 700 to 700 to 70
Operating Temperature Range(C)0 to 700 to 70
Output Drive (IOL/IOH)(Max), mA8/-0.48/-0.48/-0.48/-0.48/-0.4
Output Drive (IOL/IOH)(Max)(mA)8/-0.48/-0.4
Output TypeTTLTTL
Package GroupSOICSOICSOICPDIP
SO
SOIC
PDIPPDIPSO
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)See datasheet (PDIP)14SO: 80 mm2: 7.8 x 10.2(SO)
Package Size: mm2:W x L (PKG)See datasheet (PDIP)
See datasheet (CDIP)
See datasheet (PDIP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNo
Technology FamilyALSALSALSALSALSALSALS
VCC(Max), V5.55.55.55.55.5
VCC(Max)(V)5.55.5
VCC(Min), V4.54.54.54.54.5
VCC(Min)(V)4.54.5
Voltage(Nom), V55555
Voltage(Nom)(V)55
tpd @ Nom Voltage(Max), ns1818181818
tpd @ Nom Voltage(Max)(ns)1818

Plan ecológico

SN74ALS74ADSN74ALS74ADRSN74ALS74ADRE4SN74ALS74AJSN74ALS74ANSN74ALS74AN3SN74ALS74ANSR
RoHSObedienteObedienteObedienteDesobedienteObedienteDesobedienteObediente
Pb gratisNoNo

Notas de aplicación

  • Advanced Schottky (ALS and AS) Logic Families
    PDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
    This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t

Linea modelo

Clasificación del fabricante

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop