Datasheet Texas Instruments SN74ALS113ADR — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74ALS113A |
| Numero de parte | SN74ALS113ADR |
Chanclas de doble JK de borde negativo disparadas con preajuste 14-SOIC 0 a 70
Hojas de datos
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset
PDF, 69 Kb, Archivo publicado: mayo 1, 1986
Precios
Estado
| Estado del ciclo de vida | Obsoleto (El fabricante ha interrumpido la producción del dispositivo) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Descargar |
Plan ecológico
| RoHS | Desobediente |
| Pb gratis | No |
Notas de aplicación
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
Linea modelo
Serie: SN74ALS113A (3)
- SN74ALS113AD SN74ALS113ADR SN74ALS113AN
Clasificación del fabricante
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop