Datasheet Texas Instruments SN74ALS112AD — Ficha de datos
| Fabricante | Texas Instruments |
| Serie | SN74ALS112A |
| Numero de parte | SN74ALS112AD |
Chanclas de doble JK de borde negativo disparado con claro y preestablecido 16-SOIC 0 a 70
Hojas de datos
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear And Preset datasheet
PDF, 988 Kb, Revisión: A, Archivo publicado: dic 1, 1994
Extracto del documento
Precios
Estado
| Estado del ciclo de vida | Activo (Recomendado para nuevos diseños) |
| Disponibilidad de muestra del fabricante | No |
Embalaje
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 40 |
| Carrier | TUBE |
| Device Marking | ALS112A |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Descargar |
Paramétricos
| Bits | 2 |
| F @ Nom Voltage(Max) | 75 Mhz |
| ICC @ Nom Voltage(Max) | 4.5 mA |
| Output Drive (IOL/IOH)(Max) | -0.4/8 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ALS |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 18 ns |
Plan ecológico
| RoHS | Obediente |
Notas de aplicación
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, Archivo publicado: agosto 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
Linea modelo
Serie: SN74ALS112A (5)
- SN74ALS112AD SN74ALS112ADR SN74ALS112AN SN74ALS112AN3 SN74ALS112ANSR
Clasificación del fabricante
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop