Datasheet Texas Instruments SN74ABTH182502A — Ficha de datos

Fabricante	Texas Instruments
Serie	SN74ABTH182502A

Hojas de datos

Precios

Estado

Embalaje

Paramétricos

Parameters / Models	SN74ABTH182502APM
Bits	18
F @ Nom Voltage(Max), Mhz	150
ICC @ Nom Voltage(Max), mA	27
Operating Temperature Range, C	-40 to 85
Output Drive (IOL/IOH)(Max), mA	64/-32
Package Group	LQFP
Package Size: mm2:W x L, PKG	64LQFP: 144 mm2: 12 x 12(LQFP)
Rating	Catalog
Technology Family	ABT
VCC(Max), V	5.5
VCC(Min), V	4.5
Voltage(Nom), V	5
tpd @ Nom Voltage(Max), ns	6.2

Plan ecológico

Notas de aplicación

• Descargar
  Programming CPLDs Via the 'LVT8986 LASP
  PDF, 819 Kb, Archivo publicado: nov 1, 2005
  This application report summarizes key information required for understanding the 'LVT8986 linking addressable scan ports (LASPs) multidrop addressable IEEE Std 1149.1 (JTAG) test access port (TAP) transceiver. This report includes information about the 'LVT8986 secondary TAPs, bypass and linking shadow protocol, scan-path description languages, serial vector format files, and an example of how to
• Descargar
  Bus-Hold Circuit
  PDF, 418 Kb, Archivo publicado: feb 5, 2001
  When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
• Descargar
  Quad Flatpack No-Lead Logic Packages (Rev. D)
  PDF, 1.0 Mb, Revisión: D, Archivo publicado: feb 16, 2004
  Texas Instruments (TI) Quad Flatpack No-lead (QFN) 14/16/20-terminal Pb-free plastic packages meet dimensions specified in JEDEC standard MO-241 allow for board miniaturization and hold several advantages over traditional SOIC SSOP TSSOP and TVSOP packages. The packages are physically smaller have a smaller routing area improved thermal performance and improved electrical parasitics while
• Descargar
  Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)
  PDF, 528 Kb, Revisión: B, Archivo publicado: jun 1, 1997
  The purpose of this document is to assist the designers of high-performance digital logic systems in using the advanced BiCMOS technology (ABT) logic family. Detailed electrical characteristics of these bus-interface devices are provided and tables and graphs have been included to compare specific parameters of the ABT family with those of other logic families. In addition typical data is provide
• Descargar
  Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)
  PDF, 115 Kb, Revisión: A, Archivo publicado: marzo 1, 1997
  Advanced bus-interface logic (ABIL) products processed in submicron advanced BiCMOS technologies (ABT) address the specific end-equipment demands of workstations personal and portable computers and telecommunications markets. This document discusses ABIL as system bus interfaces the merits of ABT its I/O structure packaging and ABT products for end-equipment specific solutions.
• Descargar
  Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)
  PDF, 80 Kb, Revisión: A, Archivo publicado: dic 1, 1996
  This document shows the output skew for the ABT16254 ABT16952 and ABT16500A devices of the TI advanced BiCMOS (ABT) family. The data samples show which output skew is being examined where the data originates and how it is analyzed. Some errors present in the data are discussed. Skew curves at varying temperatures are given for the ABT16240 ABT16245 ABT16952 ABT16500A and ABT16249 devic
• Descargar
  Understanding Advanced Bus-Interface Products Design Guide
  PDF, 253 Kb, Archivo publicado: mayo 1, 1996
• Descargar
  Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
  PDF, 209 Kb, Archivo publicado: mayo 10, 2002
  Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features

Linea modelo

Clasificación del fabricante

• Semiconductors> Logic> Specialty Logic> Boundary Scan (JTAG) Logic